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path: root/llvm/test/CodeGen/X86/bitcast-vector-bool.ll
AgeCommit message (Expand)AuthorFilesLines
2025-02-03[DAG] getNode - convert scalar i1 arithmetic calls to bitwise instructions (#...Simon Pilgrim1-3/+3
2023-10-09Revert "[CodeGen] Really renumber slot indexes before register allocation (#6...Jay Foad1-54/+54
2023-10-09[CodeGen] Really renumber slot indexes before register allocation (#67038)Jay Foad1-54/+54
2023-08-08[X86] matchTruncateWithPACK - canonically prefer v4i64 -> v4i32 shuffle vs tr...Simon Pilgrim1-1/+1
2023-07-31[X86] Allow pre-SSE41 targets to extract multiple v16i8 elements coming from ...Simon Pilgrim1-59/+28
2023-07-11[X86] LowerTRUNCATE - improve handling during type legalization to PACKSS/PAC...Simon Pilgrim1-24/+16
2023-07-06[X86] Fold BITOP(PACKSS(X,Z),PACKSS(Y,W)) --> PACKSS(BITOP(X,Y),BITOP(Z,W)) (...Simon Pilgrim1-10/+10
2023-07-05Revert "[X86] Fold BITOP(PACKSS(X,Z),PACKSS(Y,W)) --> PACKSS(BITOP(X,Y),BITOP...Arthur Eubanks1-10/+10
2023-07-05[X86] Fold BITOP(PACKSS(X,Z),PACKSS(Y,W)) --> PACKSS(BITOP(X,Y),BITOP(Z,W))Simon Pilgrim1-10/+10
2023-06-14[X86] X86FixupVectorConstantsPass - attempt to replace full width integer vec...Simon Pilgrim1-1/+1
2023-06-13[DAGCombine] Make sure combined nodes are added back to the worklist in topol...Amaury Séchet1-40/+81
2023-06-06Revert rGab4b924832ce26c21b88d7f82fcf4992ea8906bb - [X86] X86FixupVectorConst...Simon Pilgrim1-1/+1
2023-06-05Revert "[DAGCombine] Make sure combined nodes are added back to the worklist ...JP Lehr1-81/+40
2023-06-05[DAGCombine] Make sure combined nodes are added back to the worklist in topol...Amaury Séchet1-40/+81
2023-05-30[X86] X86FixupVectorConstantsPass - attempt to replace full width integer vec...Simon Pilgrim1-1/+1
2023-05-23[X86] Add X86FixupVectorConstantsPass to re-fold AVX512 vector load folds as ...Simon Pilgrim1-1/+1
2023-04-14[X86] combineSetCCMOVMSK - fold anyof/noneof movmskps/movmskpd -> testps/testpdSimon Pilgrim1-6/+2
2023-04-03[X86] combineMOVMSK - merge movmsk(icmp_eq(and(x,c1),c1)) and movmsk(icmp_eq(...Simon Pilgrim1-4/+3
2023-04-03[X86] combineMOVMSK - fold movmsk(icmp_eq(and(x,c1),c1)) -> movmsk(shl(x,c2))...Simon Pilgrim1-12/+4
2023-04-03[X86] MatchVectorAllZeroTest - handle icmp_eq(bitcast(vXi1 trunc(Y)),0) style...Simon Pilgrim1-328/+251
2023-04-03[X86] Test coverage for icmp_eq(bitcast(vXi1 trunc(Y)),0) style reduction pat...Simon Pilgrim1-131/+918
2022-12-15[X86] combineBitcastvxi1 - handle boolmask sign-extension through vselectSimon Pilgrim1-16/+8
2022-12-15[X86] Add test case for Issue #59526Simon Pilgrim1-0/+71
2022-10-23[X86][AVX512] Fold extract_element(bitcast(<X x i1>) -> bitcast(extract_subve...Simon Pilgrim1-30/+38
2022-10-23[X86] Add test case for Issue #58546Simon Pilgrim1-0/+74
2022-07-19[x86] use zero-extending load of a byte outside of loops too (2nd try)Sanjay Patel1-3/+3
2022-07-19Revert "[x86] use zero-extending load of a byte outside of loops too"Sanjay Patel1-3/+3
2022-07-19[x86] use zero-extending load of a byte outside of loops tooSanjay Patel1-3/+3
2022-02-13[x86] try harder to scalarize a vector load with extracted integer op usesSanjay Patel1-4/+2
2022-02-04Revert "[x86] try harder to scalarize a vector load with extracted integer op...Sanjay Patel1-2/+4
2022-01-28[x86] try harder to scalarize a vector load with extracted integer op usesSanjay Patel1-4/+2
2021-07-31Fix the default alignment of i1 vectors.Eli Friedman1-8/+2
2020-11-11[CodeGen][X86] Remove unused check-prefixes from bitcast tests. NFCI.Wang, Pengfei1-2/+2
2020-07-29[X86][SSE] getV4X86ShuffleImm8 - canonicalize broadcast masksSimon Pilgrim1-1/+1
2020-07-04[X86][AVX] Fold PACK(LOSUBVECTOR(SHUFFLE(X)),HISUBVECTOR(SHUFFLE(X))) -> SHUF...Simon Pilgrim1-1/+1
2020-06-21[X86] Add an AVX check prefix to bitcast-vector-bool.ll to combine checks whe...Craig Topper1-81/+40
2020-06-13[X86] Teach combineBitcastvxi1 to prefer movmsk on avx512 in more casesCraig Topper1-25/+9
2020-05-08[DAG] SimplifyMultipleUseDemandedBits - remove superfluous bitcastsSimon Pilgrim1-35/+10
2020-05-02[SelectionDAG] Unify scalarizeVectorLoad and VectorLegalizer::ExpandLoadLemonBoy1-78/+81
2020-03-13[X86][SSE] Prefer trunc(movd(x)) to pextrb(x,0)Simon Pilgrim1-3/+3
2020-02-02[X86][SSE] Add bitcast <128 x i1> %1 to <2 x i64> test caseSimon Pilgrim1-0/+87
2020-02-02[X86][SSE] combineBitcastvxi1 - add pre-AVX512 v64i1 handlingSimon Pilgrim1-754/+17
2020-01-27[DAG] Enable ISD::EXTRACT_SUBVECTOR SimplifyMultipleUseDemandedBits handlingSimon Pilgrim1-2/+0
2020-01-22[X86][SSE] combineExtractWithShuffle - extract(bitcast(broadcast(x))) --> xSimon Pilgrim1-10/+0
2020-01-22[X86][SSE] combineExtractWithShuffle - extract(bictcast(scalar_to_vector(x)))...Simon Pilgrim1-136/+85
2020-01-07[X86] Improve lowering of v2i64 sign bit tests on pre-sse4.2 targetsCraig Topper1-42/+5
2019-08-12[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits ...Simon Pilgrim1-10/+8
2019-08-07Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization...Craig Topper1-103/+52
2019-08-06Revert "[X86] Enable -x86-experimental-vector-widening-legalization by default."Mitch Phillips1-52/+103
2019-08-05[X86] Enable -x86-experimental-vector-widening-legalization by default.Craig Topper1-103/+52
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