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AgeCommit message (Expand)AuthorFilesLines
9 hours[IR] Introduce the `ptrtoaddr` instructionAlexander Richardson4-0/+4
11 hours[ValueTracking] Add missing check for two-value PN recurrence matching (#152700)Ivan R. Ivanov1-0/+28
14 hours[AArch64] Generalize costing for FP16 instructions (#150033)David Green4-104/+130
16 hours[Delinearization] Add function for fixed size array without relying on GEP (#...Ryotaro Kasuga1-0/+499
16 hours[CostModel] Provide a default model for histogram intrinsics (#149348)Graham Hunter2-12/+190
17 hours[IR] Remove size argument from lifetime intrinsics (#150248)Nikita Popov20-318/+317
19 hours[AArch64] Add SVE fmuladd and fma cost tests. NFCDavid Green1-0/+52
24 hours[DA] Fix the check between Subscript and Size after delinearization (#151326)Ryotaro Kasuga3-5/+89
2 days[AMDGPU] Mark address space cast from private to flat as divergent if target ...Shilei Tian2-0/+49
3 days[InstCombine] Support offsets in `memset` to load forwarding (#151924)Pedro Lobo1-11/+2
4 days[StackLifetime] Remove handling for lifetime size mismatch (#151965)Nikita Popov1-21/+0
4 days[ARM] Use -cost-kind=all for cast and active_lane_mask tests. NFCDavid Green3-6523/+3592
4 days[AMDGPU] gfx1250 v_wmma_scale[16]_f32_16x16x128_f8f6f4 codegen (#152036)Stanislav Mekhanoshin1-0/+18
4 days[GlobalsModRef] Generate test checks (NFC)Nikita Popov1-7/+16
5 days[AArch64] Add better fcmp costs for expanded predicates (#147940)David Green5-549/+549
5 days[AArch64] Add sve bf16 fpext and fpround costs. (#150485)David Green2-19/+35
7 days[AMDGPU] gfx1250 v_permlane_* instructions (#151749)Stanislav Mekhanoshin1-0/+35
7 days[LV] Pre-commit test for #151664 (#151671)Ramkumar Ramachandra2-0/+221
8 days[LAA] Support assumptions in evaluatePtrAddRecAtMaxBTCWillNotWrap (#147047)Florian Hahn1-4/+4
8 days[GVN] Add MemorySSA coverage to tests (NFC)Antonio Frighetto1-23/+95
9 days[SECV] Try to push the op into ZExt: A + zext (-A + B) -> zext (B) (#151227)Florian Hahn1-1/+1
9 days[RISCV] Fix bug in [l](lrint|lround) vector-cost (#151298)Ramkumar Ramachandra1-12/+12
10 days[SCEV] Add test for pushing constant add into zext.Florian Hahn1-0/+52
10 daysRevert "[RISCV] Cost bf16/f16 vector non-unit memory accesses as legal withou...Luke Lau1-4/+4
10 days[CostModel/RISCV] Fix costs of vector [l](lrint|lround) (#146058)Ramkumar Ramachandra1-237/+389
11 days[ARM] Use -cost-kind=all for arith-overflow.ll, arith-ssat.ll and arith-usat....David Green3-1284/+633
11 days[RISCV] Cost bf16/f16 vector non-unit memory accesses as legal without zvfhmi...Luke Lau1-4/+4
12 days[RISCV] Add FP cost model tests for no zfhmin/zfbfmin. NFCLuke Lau1-445/+1270
12 days[RISCV] Modernize FP cost model tests. NFCLuke Lau1-1417/+1426
13 days[CostModel][X86] Update SK_Reverse based on cost kinds (#150650)Simon Pilgrim2-112/+112
14 days[LV,LAA] Add tests where RT checks are known false after expansion.Florian Hahn1-0/+50
14 days[CostModel][X86] Update SK_Broadcast based on cost kinds (#150620)Simon Pilgrim16-1205/+1205
2025-07-26[DA] Add check for base pointer invariance (#148241)Ryotaro Kasuga7-24/+79
2025-07-25[CostModel][X86] Complicate the cross lane single/two source shuffle masksSimon Pilgrim3-239/+237
2025-07-25[CostModel][X86] load-broadcast.ll - regenerate checks for all cost kindsSimon Pilgrim1-250/+250
2025-07-25[AArch64] Change sve-fcmp.ll to test scalable vectors. NFCDavid Green1-394/+394
2025-07-24[AArch64] Add sve bf16 fpext and fptrunc costs. NFCDavid Green2-1/+47
2025-07-24[TTI] Share value and type based llvm.vector.reverse cost (#150415)Luke Lau3-219/+122
2025-07-24[RISCV] Add type based RUN line for vector intrinsic cost model tests. NFCLuke Lau1-44/+91
2025-07-23[ARM] Test all cost kinds in arith.ll. NFCDavid Green1-1311/+1094
2025-07-23[Tests] Avoid lifetime intrinsics on non-allocas (NFC)Nikita Popov6-27/+25
2025-07-23[SCEV] Don't require NUW at first add when checking A+C1 < (A+C2)<nuw> (#149795)Florian Hahn2-19/+2
2025-07-23[RISCV][TTI] Implement vector costs for `llvm.fpto{u|s}i.sat()`. (#143655)Elvis Wang1-304/+304
2025-07-21AMDGPU: Support v_wmma_f32_16x16x128_f8f6f4 on gfx1250 (#149684)Changpeng Fang1-0/+9
2025-07-21[IR] Only allow lifetime.start/end on allocas (#149310)Nikita Popov9-119/+48
2025-07-21[LAA] Add test variant with backward dep with overlap in loop.Florian Hahn1-2/+41
2025-07-17[DA] Check element size when analyzing deps between same instruction (#148813)Ryotaro Kasuga2-3/+6
2025-07-16[HashRecognize] Track visited in ValueEvolution (#147812)Ramkumar Ramachandra1-3/+55
2025-07-16[AArch64] Reduce the costs of and/or/xor reductions (#148553)David Green3-24/+24
2025-07-15AMDGPU: Remove a non-existent wmma instruction from gfx1250 (#148989)Changpeng Fang1-8/+0
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