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path: root/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
AgeCommit message (Expand)AuthorFilesLines
5 days[SelectionDAG] Remove `UnsafeFPMath` in LegalizeDAG (#146316)paperchalice1-1/+1
12 days[SelectionDAG] Pass SDNodeFlags through getNode instead of setFlags. (#149852)Craig Topper1-28/+22
2025-07-13DAG: Use fast variants of fast math libcalls (#147481)Matt Arsenault1-26/+99
2025-07-09DAG: Remove dead declaration of ExpandSinCosLibCall (#147673)Matt Arsenault1-1/+0
2025-07-08[DAG] Add generic expansion for ISD::FCANONICALIZE nodes (#142105)Dominik Steenken1-0/+26
2025-06-09[CodeGen] Construct SmallVector with ArrayRef (NFC) (#143391)Kazu Hirata1-3/+1
2025-06-06RuntimeLibcalls: Rename fminimum_num/fmaximum_num enums (#143078)Matt Arsenault1-6/+6
2025-06-04Revert "[SDAG] Fix fmaximum legalization errors (#142170)"Nikita Popov1-7/+93
2025-06-03[SelectionDAG][AArch64] Legalize power of 2 vector.[de]interleaveN (#141513)Luke Lau1-0/+53
2025-06-02[SDAG] Fix fmaximum legalization errors (#142170)Nikita Popov1-93/+7
2025-05-16[SelectionDAG] Rename MemSDNode::getOriginalAlign to getBaseAlign. NFC (#139930)Craig Topper1-19/+18
2025-04-23[SDag][ARM][RISCV] Allow lowering CTPOP into a libcall (#101786)Sergei Barannikov1-20/+62
2025-04-16Fix 'unannotated fall-through between switch labels' warning. (#136000)Jonas Paulsson1-2/+2
2025-04-16[SystemZ] Add support for 16-bit floating point. (#109164)Jonas Paulsson1-0/+19
2025-04-10Reland "[SelectionDAG] Introducing a new ISD::POISON SDNode to represent the ...zhijian lin1-0/+14
2025-04-09Revert "[SelectionDAG] Introducing a new ISD::POISON SDNode to represent the ...Jakub Kuderski1-14/+0
2025-04-07[SelectionDAG] Introducing a new ISD::POISON SDNode to represent the poison v...zhijian lin1-0/+14
2025-03-27Port `NVPTXTargetLowering::LowerCONCAT_VECTORS` to SelectionDAG (#120030)Ethan Kaji1-1/+28
2025-03-25Calculate KnownBits from Metadata correctly for vector loads (#128908)LU-JOHN1-0/+8
2025-03-12[NVPTX] Legalize ctpop and ctlz in operation legalization (#130668)Alex MacLean1-1/+2
2025-03-07[SelectionDAG] Clean up some redundant setting of node flags (NFC) (#130307)John Brawn1-5/+2
2025-03-07[SelectionDAG] Preserve fast math flags when legalizing/promoting (#130124)John Brawn1-0/+3
2025-02-28[SelectionDAG][RISCV] Promote VECREDUCE_{FMAX,FMIN,FMAXIMUM,FMINIMUM} (#128800)Jim Lin1-7/+18
2025-02-11[RTLIB] Rename getFSINCOS() to getSINCOS (NFC) (#126705)Benjamin Maxwell1-2/+2
2025-02-11[IR] Add llvm.sincospi intrinsic (#125873)Benjamin Maxwell1-4/+9
2025-02-07[IR] Add `llvm.modf` intrinsic (#121948)Benjamin Maxwell1-3/+7
2025-01-31[LegalizeDAG] Use Base+Offset instead of Offset+Base for jump tablesAlexander Richardson1-5/+4
2025-01-10[SDAG] Set IsPostTypeLegalization flag in LegalizeDAG (#122278)Nikita Popov1-8/+3
2024-12-18[SelectionDAG] Rename SDNode::uses() to users(). (#120499)Craig Topper1-2/+2
2024-12-03[TargetLowering] Use Type* instead of EVT in shouldSignExtendTypeInLibCall. (...Craig Topper1-2/+2
2024-12-03[SelectionDAG] Rename CallOptions::IsSExt to IsSigned. NFC (#118574)Craig Topper1-1/+1
2024-11-25[SelectionDAG] Require last operand of (STRICT_)FP_ROUND to be a TargetConsta...Craig Topper1-5/+9
2024-11-25[SelectionDAG][RISCV][AArch64] Allow f16 STRICT_FLDEXP to be promoted. Fix in...Craig Topper1-0/+13
2024-11-25[AMDGPU] Use getSignedConstant() where necessary (#117328)Nikita Popov1-6/+6
2024-11-06[SDAG] Merge multiple-result libcall expansion into DAG.expandMultipleResultF...Benjamin Maxwell1-46/+11
2024-10-31[SDAG] Support expanding `FSINCOS` to vector library calls (#114039)Benjamin Maxwell1-70/+1
2024-10-30[LegalizeDAG] Use getSignedConstant. NFCCraig Topper1-1/+1
2024-10-31[SDAG] Simplify `SDNodeFlags` with bitwise logic (#114061)Yingwei Zheng1-5/+2
2024-10-29DAG: Fix legalization of vector addrspacecasts (#113964)Matt Arsenault1-0/+3
2024-10-29[IR] Add `llvm.sincos` intrinsic (#109825)Benjamin Maxwell1-0/+21
2024-10-16[X86][CodeGen] Add base atan2 intrinsic lowering (p4) (#110760)Tex Riddell1-0/+7
2024-10-08Fix comment typo in ExpandFCOPYSIGN (#111489)Ralf Jung1-1/+2
2024-10-04[SDAG][RISCV] Don't promote VP_REDUCE_{FADD,FMUL} (#111000)Luke Lau1-3/+0
2024-09-25[SDAG] Honor signed arguments in floating point libcalls (#109134)Timothy Pearson1-1/+2
2024-09-24[SDAG] Avoid creating redundant stack slots when lowering FSINCOS (#108401)Benjamin Maxwell1-55/+51
2024-08-30[AArch64][SelectionDAG] Vector splitting and promotion for histogram intrinsi...Max Beck-Jones1-0/+5
2024-08-17[SelectionDAG] Use getAllOnesConstant.Craig Topper1-2/+3
2024-08-16[SelectionDAG][X86] Add SelectionDAG::getSignedConstant and use it in a few p...Craig Topper1-1/+1
2024-08-15Intrinsic: introduce minimumnum and maximumnum for IR and SelectionDAG (#96649)YunQiang Su1-0/+17
2024-08-13[SelectionDAG] Replace EVTToAPFloatSemantics with MVT/EVT::getFltSemantics. (...Craig Topper1-3/+3
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