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7 hoursRevert "Renormalize line endings whitespace only after dccebddb3b80"Luke Drummond1-80/+80
This reverts commit 9d98acb196a40fee5229afeb08f95fd36d41c10a.
7 hoursRevert "Finally formalise our defacto line-ending policy"Luke Drummond1-6/+0
This reverts commit dccebddb3b802c4c1fe287222e454b63f850f012.
35 hoursDocument the requirement that commits have a public email address (#109318)Aaron Ballman1-0/+7
See https://discourse.llvm.org/t/hidden-emails-on-github-should-we-do-something-about-it/74223 for details about why this is important to the community. Note, we currently have soft enforcement for this requirement in the form of a bot which posts comments letting patch authors know their email is private, so we're already setting expectations in practice; this PR is documenting those expectations for clarity.
38 hoursRenormalize line endings whitespace only after dccebddb3b80Luke Drummond1-80/+80
Line ending policies were changed in the parent, dccebddb3b80. To make it easier to resolve downstream merge conflicts after line-ending policies are adjusted this is a separate whitespace-only commit. If you have merge conflicts as a result, you can simply `git add --renormalize -u && git merge --continue` or `git add --renormalize -u && git rebase --continue` - depending on your workflow.
38 hoursFinally formalise our defacto line-ending policyLuke Drummond1-0/+6
Historically, we've not automatically enforced how git tracks line endings, but there are many, many commits that "undo" unintended CRLFs getting into history. `git log --pretty=oneline --grep=CRLF` shows nearly 100 commits involving reverts of CRLF making its way into the index and then history. As far as I can tell, there are none the other way round except for specific cases like `.bat` files or tests for parsers that need to accept such sequences. Of note, one of the earliest of those listed in that output is: ``` commit 9795860250734e5c2a879546c534e35d9edd5944 Author: NAKAMURA Takumi <geek4civic@gmail.com> Date: Thu Feb 3 11:41:27 2011 +0000 cmake/*: Add svn:eol-style=native and fix CRLF. llvm-svn: 124793 ``` ...which introduced such a defacto policy for subversion. With old versions of git, it's been a bit of a crap-shoot whether enforcing storing line endings in the history will upset checkouts on machines where such line endings are the norm. Indeed many users have enforced that git checks out the working copy according to a global or per-user config via core crlf, or core autocrlf. For ~8 years now[1], however, git has supported the ability to "do as the Romans do" on checkout, but internally store subsets of text files with line-endings specified via a system of patterns in the `.gitattributes` file. Since we now have this ability, and we've been specifying attributes for various binary files, I think it makes sense to rid us of all that work converting things "back", and just let git handle the local checkout. Thus the new toplevel policy here is * text=auto In simple terms this means "unless otherwise specified, convert all files considered "text" files to LF in the project history, but check them out as expected on the local machine. What is "expected on the local machine" is dependent on configuration and default. For those files in the repository that *do* need CRLF endings, I've adopted a policy of `eol=crlf` which means that git will store them in history with LF, but regardless of user config, they'll be checked out in tree with CRLF. Finally, existing files have been "corrected" in history via `git add --renormalize .` End users should *not* need to adjust their local git config or workflow. [1]: git 2.10 was released with fixed support for fine-grained line-ending tracking that respects user-config *and* repo policy. This can be considered the point at which git will respect both the user's local working tree preference *and* the history as specified by the maintainers. See https://github.com/git/git/blob/master/Documentation/RelNotes/2.10.0.txt#L248 for the release note.
39 hours[ARM] Fix -mno-omit-leaf-frame-pointer flag doesn't works on 32-bit ARM ↵gxlayer1-0/+6
(#109628) The -mno-omit-leaf-frame-pointer flag works on 32-bit ARM architectures and addresses the bug reported in #108019
3 days[SPIR-V] Implement support of the SPV_INTEL_split_barrier SPIRV extension ↵Vyacheslav Levytskyy1-0/+2
(#112359) This PR implements support of the SPV_EXT_arithmetic_fence SPIRV extension (https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_split_barrier.asciidoc) and adds builtins from https://registry.khronos.org/OpenCL/extensions/intel/cl_intel_split_work_group_barrier.html
4 days[IR] Add `samesign` flag to icmp instruction (#111419)elhewaty1-0/+4
Inspired by https://discourse.llvm.org/t/rfc-signedness-independent-icmps/81423
5 days[NFC][CodingStandard] Extend if-else brace example with else-if (#112193)Rahul Joshi1-1/+4
Extend example to document that single statement `else if` needs a brace as well if the associated `if` needs a brace.
5 daysRevert "[llvm][ARM] Add Addend Checks for MOVT and MOVW instructions.… ↵Jack Styles1-5/+0
(#112184) … (#111970)" I was made aware of breakages in Windows/ARM, so reverting while I investigate. This reverts commit f3aebe623b49b7ae14d0f0996999114aac052e4b.
5 days[LangRef] Document that sret only works with void returns (#112167)Jubilee1-2/+4
5 days[llvm][ARM] Add Addend Checks for MOVT and MOVW instructions. (#111970)Jack Styles1-0/+5
Previously, any value could be used for the MOVT and MOVW instructions, however the ARM ABI dictates that the addend should be a signed 16 bit value. To ensure this is followed, the Assembler will now check that when using these instructions, the addend is a 16bit signed value, and throw an error if this is not the case. Information relating to the ABI requirements can be found here: https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst#addends-and-pc-bias-compensation
5 days[llvm][docs] Document how to get admin permissions for a Buildbot worker ↵David Spickett1-1/+30
(#108561) I spent a long time trying different combinations of primary and verified emails, until a colleague tried it who happened to have a public profile email set when I did not. Document how this works to save everyone else the legwork.
7 days[LLVM] New NoDivergenceSource function attribute (#111832)Tim Renouf1-0/+6
A call to a function that has this attribute is not a source of divergence, as used by UniformityAnalysis. That allows a front-end to use known-name calls as an instruction extension mechanism (e.g. https://github.com/GPUOpen-Drivers/llvm-dialects ) without such a call being a source of divergence.
7 days[Docs] Fix typo in recent coro docs (#112005)Thomas Symalla1-1/+1
8 days[IR] LangRef: state explicitly that floats generally behave according to ↵Ralf Jung1-17/+53
IEEE-754 (#102140) Fixes https://github.com/llvm/llvm-project/issues/60942: IEEE semantics is likely what many frontends want (it definitely is what Rust wants), and it is what LLVM passes already assume when they use APFloat to propagate float operations. This does not reflect what happens on x87, but what happens there is just plain unsound (https://github.com/llvm/llvm-project/issues/89885, https://github.com/llvm/llvm-project/issues/44218); there is no coherent specification that will describe this behavior correctly -- the backend in combination with standard LLVM passes is just fundamentally buggy in a hard-to-fix-way. There's also the questions around flushing subnormals to zero, but [this discussion](https://discourse.llvm.org/t/questions-about-llvm-canonicalize/79378) seems to indicate a general stance of: this is specific non-standard hardware behavior, and generally needs LLVM to be told that basic float ops do not return the standard result. Just naively running LLVM-compiled code on hardware configured to flush subnormals will lead to #89885-like issues. AFAIK this is also what Alive2 implements (@nunoplopes please correct me if I am wrong).
8 days[NFC][CodingStandard] Add additional example for if-else brace rule (#111733)Rahul Joshi1-0/+8
Add example to document that single statement `else` needs a brace if the associated `if` needs a brace.
8 daysAMDGPU/GlobalISel: Fix inst-selection of ballot (#109986)Petar Avramovic1-0/+6
Both input and output of ballot are lane-masks: result is lane-mask with 'S32/S64 LLT and SGPR bank' input is lane-mask with 'S1 LLT and VCC reg bank'. Ballot copies bits from input lane-mask for all active lanes and puts 0 for inactive lanes. GlobalISel did not set 0 in result for inactive lanes for non-constant input.
8 days[IR] Allow MDString in operand bundles (#110805)Serge Pavlov2-3/+5
This change implements support of metadata strings in operand bundle values. It makes possible calls like: call void @some_func(i32 %x) [ "foo"(i32 42, metadata !"abc") ] It requires some extension of the bitcode serialization. As SSA values and metadata are stored in different tables, there must be a way to distinguish them during deserialization. It is implemented by putting a special marker before the metadata index. The marker cannot be treated as a reference to any SSA value, so it unambiguously identifies metadata. It allows extending the bitcode serialization without breaking compatibility. Metadata as operand bundle values are intended to be used in floating-point function calls. They would represent the same information as now is passed by the constrained intrinsic arguments.
8 days[Coroutines] Documentation for custom ABIs (#111781)Tyler Nowicki1-0/+90
Update the llvm/docs/Coroutines.rst docs to include a full description of Custom ABI objects. This documentation describes the how ABI objects allow users (plugin libraries) to create custom ABI objects for their needs.
9 days[LLVM][DOCS] Add documentation for 'host' and 'Native' options in ↵Harrison Hao1-0/+6
LLVM_TARGETS_TO_BUILD. (#111382) From https://github.com/llvm/llvm-project/issues/111356
10 days[docs] Update the libc++ documentation linkNikolas Klauser1-3/+3
The link has changed a while ago, which means that the old link is now a 404. This fixes the link to point to the correct documentation.
10 days[docs] Fix llround typo in LangRef (#111426)Johan Engelen1-5/+5
10 days[DLCov 1/5] Add CMake option for enhanced debug line coverage tracking (#107278)Stephen Tozer1-0/+9
This is part of a series of patches that tries to improve DILocation bug detection in Debugify. This first patch adds the necessary CMake flag to LLVM and a variable defined by that flag to LLVM's config header, allowing the next patch to track information without affecting normal builds. This series of patches adds a "DebugLoc coverage tracking" feature, that inserts conditionally-compiled tracking information into DebugLocs (and by extension, to Instructions), which is used by Debugify to provide more accurate and detailed coverage reports. When enabled, this features tracks whether and why we have intentionally dropped a DebugLoc, allowing Debugify to ignore false positives. An optional additional feature allows also storing a stack trace of the point where a DebugLoc was unintentionally dropped/not generated, which is used to make fixing detected errors significantly easier. The goal of these features is to provide useful tools for developers to fix existing DebugLoc errors and allow reliable detection of regressions by either manual inspection or an automated script.
10 days[SPIRV] Implement handle_fromBinding intrinsic. (#111052)Steven Perron1-0/+7
Implement the intrinsic `llvm.spv.handle.fromBinding`, which returns the handle for a global resource. This involves creating a global variable that matches the return-type, set, and binding in the call, and returning the handle to that resource. This commit implements the scalar version. It does not handle arrays of resources yet. It also does not handle storage buffers yet. We do not have the type for the storage buffers designed yet. Part of #81036
10 days[sanitizer] Document AddressSanitizer security considerations (#100937)bigb4ng1-8/+12
Follow-up to #92593. Also makes #92611, https://github.com/google/sanitizers/issues/1130 obsolete.
11 days[RISCV][MC] Support Assembling 48- and 64-bit Instructions (#110022)Sam Elliott1-0/+14
This adds `.insn` support for assembling instructions of 48- and 64-bits (only when giving an explicit length). Disassembly already knows to bunch up the instruction bits for these instructions. This changes some error messages so they are a little clearer. Co-authored-by: Sudharsan Veeravalli <quic_svs@quicinc.com>
11 days[llvm][docs] Improve the formatting of the Common Problems section (#108522)David Spickett2-29/+53
...and add shared libs as a suggestion. * Mark options, option values and program names as plain text. * Add a blank line between the option and the explanatory text so that it doesn't get printed on the same line. (this seems to be the original intent of the rst source anyway) * Update the phrasing of a couple of the options. * Add BUILD_SHARED_LIBS to suggestions.
11 days[RFC] IR: Define noalias.addrspace metadata (#102461)Matt Arsenault2-0/+39
This is intended to solve a problem with lowering atomics in OpenMP and C++ common to AMDGPU and NVPTX. In OpenCL and CUDA, it is undefined behavior for an atomic instruction to modify an object in thread private memory. In OpenMP, it is defined. Correspondingly, the hardware does not handle this correctly. For AMDGPU, 32-bit atomics work and 64-bit atomics are silently dropped. We therefore need to codegen this by inserting a runtime address space check, performing the private case without atomics, and fallback to issuing the real atomic otherwise. This metadata allows us to avoid this extra check and branch. Handle this by introducing metadata intended to be applied to atomicrmw, indicating they cannot access the forbidden address space.
12 days[doc] Fix Kaleidoscope tutorial chapter 3 code snippet and full listing ↵AidinT1-2/+2
discrepancies (#111289) Fix two discrepancies between the cited snippets and the full code.
12 days[AMDGPU] Only emit SCOPE_SYS global_wb (#110636)Pierre van Houtryve1-208/+126
global_wb with scopes lower than SCOPE_SYS is unnecessary for correctness. I was initially optimistic they would be very cheap no-ops but they can actually be quite expensive so let's avoid them.
12 days[AMDGPU] Support preloading hidden kernel arguments (#98861)Austin Kerbow1-0/+10
Adds hidden kernel arguments to the function signature and marks them inreg if they should be preloaded into user SGPRs. The normal kernarg preloading logic then takes over with some additional checks for the correct implicitarg_ptr alignment. Special care is needed so that metadata for the hidden arguments is not added twice when generating the code object.
2024-10-04[doc] Fix rendering for objcopy's --remove-symbol-prefix option text (#111131)bd1976bris1-2/+2
2024-10-04[doc] Add --verify-json to dwarfdump documentation (#110909)bd1976bris1-0/+28
This adds documentation for --verify-json, see: https://github.com/llvm/llvm-project/pull/81762
2024-10-04[doc] Add llvm --error-display to dwarfdump documentation (#110922)bd1976bris1-0/+10
This adds documentation for --error-display, see: https://github.com/llvm/llvm-project/pull/79648
2024-10-03[LIT] Rename substitution `%basename_s` to `%{s:basename}` (#111062)Rahul Joshi1-2/+3
Also added `%{t:stem}` as an alias for `%basename_t` and modified unit test to test these new substitutions.
2024-10-03[LIT] Add support for `%basename_s` to get base name of source file (#110993)Rahul Joshi1-0/+1
Add support for `%basename_s` pattern in the RUN commands to get the base name of the source file, and adopt it in a TableGen LIT test.
2024-10-03[SPIRV] Make access qualifier optional for spirv.Image type (#110852)Steven Perron1-5/+5
The SPIRV backend has a special type named `spirv.Image`. This type is meant to correspond to the OpTypeImage instruction in SPIR-V, but there is one difference. The access qualifier operand in OpTypeImage is optional. On top of that, the access qualifiers are only valid for kernels, and not for shaders. We want to reuse this type when generating shader from HLSL, but we can't use the access qualifier. This commit make the access qualifer optional in the target extension type. The same is done for `spirv.SampledImage`. Contributes to #81036
2024-10-02[NFC][TableGen] Change `Record::getSuperClasses` to use const Record* (#110845)Rahul Joshi1-1/+1
Change `Record::getSuperClasses` to return a const pointer to the superclass records. This is a part of effort to have better const correctness in TableGen backends: https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
2024-10-02[Docs] Clean leftoverRenato Golin1-1/+0
2024-10-02[Docs] Update office hours to not conflict with MLGORenato Golin1-2/+3
2024-10-02[Docs] Change office hoursRenato Golin1-1/+1
2024-10-02Fix typo (NFC) (#110817)Benjamin Maxwell1-1/+1
2024-10-02[IR] Allow fast math flags on calls with homogeneous FP struct types (#110506)Benjamin Maxwell1-20/+29
This extends FPMathOperator to allow calls that return literal structs of homogeneous floating-point or vector-of-floating-point types. The intended use case for this is to support FP intrinsics that return multiple values (such as `llvm.sincos`).
2024-10-01Revert "[Utils] Add new --update-tests flag to llvm-lit" (#110772)Henrik G. Olsson1-5/+0
Reverts llvm/llvm-project#108425
2024-10-01[Utils] Add new --update-tests flag to llvm-lit (#108425)Henrik G. Olsson1-0/+5
This adds a flag to lit for detecting and updating failing tests when possible to do so automatically. The flag uses a plugin architecture where config files can add additional auto-updaters for the types of tests in the test suite. When a test fails with `--update-tests` enabled lit passes the test RUN invocation and output to each registered test updater until one of them signals that it updated the test (or all test updaters have been run). As such it is the responsibility of the test updater to only update tests where it is reasonably certain that it will actually fix the test, or come close to doing so. Initially adds support for UpdateVerifyTests and UpdateTestChecks. The flag is currently only implemented for lit's internal shell, so `--update-tests` implies `LIT_USE_INTERNAL_SHELL=1`. Builds on work in #97369 Fixes #81320
2024-10-01[SPIR-V] Implement support of the SPV_EXT_arithmetic_fence SPIRV extension ↵Vyacheslav Levytskyy1-0/+2
(#110500) This PR implements support of the SPV_EXT_arithmetic_fence SPIRV extension: https://htmlpreview.github.io/?https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/EXT/SPV_EXT_arithmetic_fence.html.
2024-09-30[docs][amdgpu] Update kernarg documentation for gfx90a (#109690)Jakub Kuderski1-1/+1
Update the docs to mention that kernel argument preloading is not supported on MI210.
2024-09-30[AMDGPU] Convert AMDGPUResourceUsageAnalysis pass from Module to MF pass ↵Janek van Oirschot1-0/+49
(#102913) Converts AMDGPUResourceUsageAnalysis pass from Module to MachineFunction pass. Moves function resource info propagation to to MC layer (through helpers in AMDGPUMCResourceInfo) by generating MCExprs for every function resource which the emitters have been prepped for. Fixes https://github.com/llvm/llvm-project/issues/64863
2024-09-28Reland "[NVVM] Upgrade nvvm.ptr.* intrinics to addrspace cast" (#110262)Alex MacLean1-63/+0
Remove the following intrinsics which can be trivially replaced with an `addrspacecast` * llvm.nvvm.ptr.gen.to.global * llvm.nvvm.ptr.gen.to.shared * llvm.nvvm.ptr.gen.to.constant * llvm.nvvm.ptr.gen.to.local * llvm.nvvm.ptr.global.to.gen * llvm.nvvm.ptr.shared.to.gen * llvm.nvvm.ptr.constant.to.gen * llvm.nvvm.ptr.local.to.gen Also, cleanup the NVPTX lowering of `addrspacecast` making it more concise. This was reverted to avoid conflicts while reverting #107655. Re-landing unchanged.