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AgeCommit message (Expand)AuthorFilesLines
2019-08-08Update the handling of shift rotate and load/store multiple instructions in ...Yoshinori Sato1-47/+47
2019-07-24[ARC] Update ARC opcode tableClaudiu Zissulescu1-0/+2
2019-07-16x86: fold SReg{2,3}Jan Beulich1-0/+1
2019-07-01[gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AESMatthew Malcomson1-1/+1
2019-05-24PowerPC add initial -mfuture instruction supportPeter Bergner1-0/+18
2019-05-16[PATCH 1/57][Arm][GAS]: Add support for +mve and +mve.fpAndre Vieira1-0/+2
2019-05-09[binutils][aarch64] New SVE_SHLIMM_UNPRED_22 operand.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New sve_size_tsz_bhs iclass.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New SVE_Zm4_11_INDEX operand.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New sve_shift_tsz_bhsd iclass.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand.Matthew Malcomson1-0/+2
2019-05-09[binutils][aarch64] New sve_size_013 iclass.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New sve_size_bh iclass.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New sve_size_sd2 iclass.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New SVE_ADDR_ZX operand.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New SVE_Zm3_11_INDEX operand.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New iclass sve_size_hsd2.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] Introduce SVE_IMM_ROT3 operand.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] SVE2 feature extension flags.Matthew Malcomson1-0/+7
2019-05-06Add load-link, store-conditional paired EVA instructionsFaraz Shahbazker1-0/+5
2019-05-01[BINUTILS, AArch64] Enable Transactional Memory ExtensionSudakshina Das1-1/+3
2019-04-26[MIPS] Add load-link, store-conditional paired instructionsAndrew Bennett1-0/+4
2019-04-25MIPS/include: opcode/mips.h: Update stale comment for CODE20 operandMaciej W. Rozycki1-2/+2
2019-04-15[binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLIAndre Vieira1-0/+6
2019-04-11[BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructionsSudakshina Das1-0/+1
2019-04-01[GAS, Arm] CLI with architecture sensitive extensionsAndre Vieira1-7/+24
2019-03-28PR24390, Don't decode mtfsb field as a cr fieldAlan Modra1-1/+4
2019-01-31S/390: Implement instruction set extensionsAndreas Krebbel1-0/+1
2019-01-25AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Exte...Sudi Das1-2/+0
2019-01-05RX: include - Add RXv3 support.Yoshinori Sato1-0/+32
2019-01-01Update year range in copyright notice of binutils filesAlan Modra69-69/+69
2018-12-28PR24028, PPC_INT_FMTAlan Modra1-8/+0
2018-12-06PowerPC @l, @h and @ha warnings, plus VLE e_liAlan Modra1-0/+5
2018-12-06opcodes/riscv: Hide '.L0 ' fake symbolsAndrew Burgess1-0/+6
2018-12-03RISC-V: Accept version, supervisor ext and more than one NSE for -march.Jim Wilson1-1/+1
2018-11-27RISC-V: Add .insn CA support.Jim Wilson1-0/+4
2018-11-13[ARM] Improve indentation of ARM architecture declarationsThomas Preud'homme1-254/+281
2018-11-12[BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging ExtensionSudakshina Das1-0/+2
2018-11-12[BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten...Sudakshina Das1-0/+8
2018-11-12[BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex...Sudakshina Das1-0/+2
2018-11-12[BINUTILS, AARCH64, 1/8] Add support for Memory Tagging Extension for ARMv8.5-ASudakshina Das1-0/+2
2018-11-06[BINUTILS, ARM] Add Armv8.5-A to select_arm_features and update macros.Sudakshina Das1-4/+3
2018-10-09[PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRSSudakshina Das1-1/+4
2018-10-09[PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registersSudakshina Das1-1/+8
2018-10-09[PATCH, BINUTILS, AARCH64, 7/9] Add BTI instructionSudakshina Das1-1/+12
2018-10-09[PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructionsSudakshina Das1-0/+2
2018-10-09[PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instructionSudakshina Das1-1/+4
2018-10-09[PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructionsSudakshina Das1-1/+6
2018-10-09[PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-ASudakshina Das1-1/+4
2018-10-09[PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing instructions for ARMv8.5-ASudakshina Das1-1/+8