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author | Sudakshina Das <sudi.das@arm.com> | 2018-09-26 10:47:40 +0100 |
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committer | Richard Earnshaw <Richard.Earnshaw@arm.com> | 2018-10-09 15:11:27 +0100 |
commit | 68dfbb92ef5f013a315d652c88ede2082c16a88e (patch) | |
tree | 185bdc259751e0288215a6a0452537b6b1b0049a /include/opcode | |
parent | 13c60ad7e1211ee1dfbf6bfb5e35110a33e4eed5 (diff) | |
download | gdb-68dfbb92ef5f013a315d652c88ede2082c16a88e.zip gdb-68dfbb92ef5f013a315d652c88ede2082c16a88e.tar.gz gdb-68dfbb92ef5f013a315d652c88ede2082c16a88e.tar.bz2 |
[PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-A
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order)
This instruction is retrospectively made optional for all versions of
the architecture from ARMv8.0 to ARMv8.4 and is mandatory from
ARMv8.5. Hence a new command line option of "+sb" is added for older
architectures.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_SB): New.
(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_SB by default.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-tbl.h (aarch64_feature_sb): New.
(SB, SB_INSN): New.
(aarch64_opcode_table): Add entry for sb.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (aarch64_features): Add new "sb" option
for older architectures.
* doc/c-aarch64.texi: Document the same.
* testsuite/gas/aarch64/sb.s: New.
* testsuite/gas/aarch64/sb.d: New.
Diffstat (limited to 'include/opcode')
-rw-r--r-- | include/opcode/aarch64.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index fb20bd7..7e113e4 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -68,6 +68,8 @@ typedef uint32_t aarch64_insn; #define AARCH64_FEATURE_FLAGMANIP 0x4000000000ULL /* FRINT[32,64][Z,X] insns. */ #define AARCH64_FEATURE_FRINTTS 0x8000000000ULL +/* SB instruction. */ +#define AARCH64_FEATURE_SB 0x10000000000ULL /* Architectures are the sum of the base and extensions. */ #define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \ @@ -94,7 +96,8 @@ typedef uint32_t aarch64_insn; #define AARCH64_ARCH_V8_5 AARCH64_FEATURE (AARCH64_ARCH_V8_4, \ AARCH64_FEATURE_V8_5 \ | AARCH64_FEATURE_FLAGMANIP \ - | AARCH64_FEATURE_FRINTTS) + | AARCH64_FEATURE_FRINTTS \ + | AARCH64_FEATURE_SB) #define AARCH64_ARCH_NONE AARCH64_FEATURE (0, 0) |