Clarify Zicsr dependence

Signed-off-by: Nick Knight <nick.knight@sifive.com>

Clarify that compares only AND in the mask if vd == v0

Fixes #900

Signed-off-by: Michael Platzer <michael.platzer@axelera.ai>

Clarify that vf[red]min/max perform minimumNumber/maximumNumber

"Clarify" that vlm/vsm respect vtype.vill

These have completed public review.

Update element group illegal-inst behavior to match vector crypto

EGS < VLMAX is illegal.  However, vl being indivisible by EGS is merely
reserved.

This design preserves the most important error checking (of code that
assumes VLEN is larger than it actually is) but simplifies implementations
that do not know vl early in the pipeline.

The vlm/vsm instructions are only meant to be used when vill=0, since
they are designed to spill or fill only the active subset of a mask
register, rather than a whole register.

Recently, the argument was made that they don't truly depend on vtype,
since their behavior does not depend on the vma, vta, vsew, or vlmul
fields.  However, the instructions are obviously useless when vill=1,
since vill=1 implies vl=0, and so the instructions would become NOPs.

My take is that the instructions indirectly depend on vtype, since
they depend on vl, and vtype governs the set of values vl may assume.
It's not clear that my reasoning is ironclad, but I do believe it to
be in line with what the spec authors intended.

A few minor fixes

Signed-off-by: Hugues de Lassus <hugues.delassus@sifive.com>

Signed-off-by: Hugues de Lassus <hugues.delassus@sifive.com>

Other occurences use "whole register" even when used as an adjective,
which makes it easier to search for when regex search is not available
(e.g. in a browser).

Signed-off-by: Hugues de Lassus <hugues.delassus@sifive.com>

Delete non-normative claim that vmv<nr>r.v doesn't depend on vtype

The normative text says that vmv<nr>r.v "operates as though EEW=SEW",
meaning that it _does_ depend on vtype.

The semantic difference becomes visible through vstart, since vstart is
measured in elements; hence, how to set vstart on an interrupt, or
interpret vstart upon resumption, depends on vtype.

Signed-off-by: Nick Knight <nick.knight@sifive.com>

This matches how the vset(i)vli instructions are defined.

I'm not sure what the 'z' in zimm was meant to convey. The base ISA spec uses nzimm, but to mean an immediate that can't be zero, but I don't think it ever uses zimm.

Signed-off-by: Craig Topper <craig.topper@gmail.com>

Signed-off-by: Craig Topper <craig.topper@gmail.com>

Signed-off-by: Nicolas Brunie <82109999+nibrunieAtSi5@users.noreply.github.com>

Signed-off-by: Nicolas Brunie <82109999+nibrunieAtSi5@users.noreply.github.com>

Two tables had an empty and unused last column since c32b714b



Signed-off-by: Hugues de Lassus <hugues.delassus@sifive.com>

Signed-off-by: Hugues de Lassus <hugues.delassus@sifive.com>

It's not meaningful to restrict vstart values on the basis of SEW
alone, as the maximum element index is a function of LMUL, as well.

Signed-off-by: Jiuyang Liu <liu@jiuyang.me>

Signed-off-by: Jiuyang Liu <liu@jiuyang.me>

Resolves #846

As discussed on that issue, this isn't a normative change, but to treat
readers more kindly, we'll remove the emphasis that might have lent the
wrong impression that masked stores have stronger guarantees than
unmasked ones.

For consistency with the unprivileged ISA spec, use the verb "depend"
to say that an extension requires and implies another.

Explicitly state the dependence between V and Zve*.

Correction to non-normative text. If EMUL < 1, segmented ld/st act as if it were 1 for purposes of determining the size of the destination register group.

Signed-off-by: Adrian Harris <48252020+aharris-ventana@users.noreply.github.com>

Signed-off-by: Adrian Harris <48252020+aharris-ventana@users.noreply.github.com>

Co-authored-by: Adam Latos <alatos@marvell.com>

Changed constraint on vsetvl to remain backwards-compatible.

Added vl setting constraint to avoid element groups being broken across strip-mine interations in vector-length-agnostic code.

Added comment on use of vmmv.m instruction with same source and destination to indicate register will be used as a mask.