- May 11, 2024
-
-
agozillon authored
This patch is one in a stack of four patches that seeks to refactor slightly and extend the current record type map support that was put in place for Fortran's descriptor types to handle explicit member mapping for record types at a single level of depth. For example, the below case where members of Fortran derived types are mapped explicitly: ``` type :: scalar_and_array real(4) :: real integer(4) :: array(10) integer(4) :: int end type scalar_and_array type(scalar_and_array) :: scalar_arr !$omp target map(tofrom: scalar_arr%int, scalar_arr%real) ``` ``` type :: bottom_layer real(8) :: i2 real(4) :: array_i2(10) real(4) :: array_j2(10) end type bottom_layer type :: top_layer real(4) :: i integer(4) :: array_i(10) real(4) :: j type(bottom_layer) :: nested integer, allocatable :: array_j(:) integer(4) :: k end type top_layer type(top_layer) :: top_dtype !$omp target map(tofrom: top_dtype%nested%i2, top_dtype%k, top_dtype%nested%array_i2) ``` Current cases of derived type mapping left for future work are: - Fortran's automagical mapping of all elements and nested elements of a derived type - explicit member mapping of a derived type and then constituent members (redundant in Fortran due to former case but still legal as far as I am aware) - explicit member mapping of a record type (may be handled reasonably, just not fully tested in this iteration) - explicit member mapping for Fortran allocatable types (a variation of nested record types) This patch seeks to support this by extending the Flang-new OpenMP lowering to support generation of this newly required information, creating the necessary parent <-to-> member map_info links, calculating the member indices and setting if it's a partial map. The OMPDescriptorMapInfoGen pass has also been generalized into a map finalization phase, now named OMPMapInfoFinalization. This pass was extended to support the insertion of member maps into the BlockArg and MapOperands of relevant map carrying operations. Similar to the method in which descriptor types are expanded and constituent members inserted. -
Andrew Gozillon authored
Created using spr 1.3.4 [skip ci]
-
- May 10, 2024
-
-
Florian Hahn authored
Follow-up o fix test after 28767afd.
-
Tomas Matheson authored
-
Paul Walker authored
We have many instances of (Ty ZPR:$op) than can be written as Ty:$Op. Whilst other operands can also be simplified this patch focuses on removing redundant instances of PPR, PNR and ZPR only.
-
Petar Avramovic authored
isSafeToSink needs to check if machine cycle has divergent exit branch but first it needs the MBB that contains cycle exit branch. Early-tailduplication can delete exit block created by structurize-cfg so there is still exactly one cycle exit block but the new cycle exit block can have multiple predecessors. Simplify search for MBBs that contain cycle exit branch by introducing helper method getExitingBlocks in GenericCycle. Fixes #89200
-
Momchil Velikov authored
According to the specification in https://github.com/ARM-software/acle/pull/309 this adds the intrinsics void svmopa_za16[_f16]_m(uint64_t tile, svbool_t pn, svbool_t pm, svfloat16_t zn, svfloat16_t zm) __arm_streaming __arm_inout("za"); void svmops_za16[_f16]_m(uint64_t tile, svbool_t pn, svbool_t pm, svfloat16_t zn, svfloat16_t zm) __arm_streaming __arm_inout("za"); as well as the corresponding `bf16` variants.
-
Tomas Matheson authored
Before #90987 WFxT did not have an AEK_WFXT, so it was assumed to be an FMV-only extension. However it also had a SubtargetFeature. This commit combines the two. This fixes an issue where -mattr=+wfxt was ignored, but has the side effect of allowing +wfxt as an option to -march.
-
Florian Hahn authored
Following up to 933f4924, also update the code reasoning about backwards dependences to support non-constant distances. Update the code to use the signed minimum distance instead of a constant distance This means e checked the lower bound of the dependence distance and the distance may be larger at runtime (and safe for vectorization). Whether to classify it as Unknown or Backwards depends on the vector width and LAA was updated to take TTI to get the maximum vector register width. If the minimum dependence distance is larger than the max vector width, we consider it as backwards-vectorizable. Otherwise we classify them as Unknown, so we re-try with runtime checks. PR: https://github.com/llvm/llvm-project/pull/91525
-
Graham Hunter authored
Part of the work to support vscale-relative immediates in LSR.
-
Momchil Velikov authored
According to the specification in https://github.com/ARM-software/acle/pull/309 add the following intrinsics void svmla[_single]_za16[_f16]_vg1x2(uint32_t slice, svfloat16x2_t zn, svfloat16_t zm) void svmla[_single]_za16[_f16]_vg1x4(uint32_t slice, svfloat16x4_t zn, svfloat16_t zm) void svmls[_single]_za16[_f16]_vg1x2(uint32_t slice, svfloat16x2_t zn, svfloat16_t zm) void svmls[_single]_za16[_f16]_vg1x4(uint32_t slice, svfloat16x4_t zn, svfloat16_t zm) void svmla_za16[_f16]_vg1x2(uint32_t slice, svfloat16x2_t zn, svfloat16x2_t zm) void svmla_za16[_f16]_vg1x4(uint32_t slice, svfloat16x4_t zn, svfloat16x4_t zm) void svmls_za16[_f16]_vg1x2(uint32_t slice, svfloat16x2_t zn, svfloat16x2_t zm) void svmls_za16[_f16]_vg1x4(uint32_t slice, svfloat16x4_t zn, svfloat16x4_t zm) void svmla_lane_za16[_f16]_vg1x2(uint32_t slice, svfloat16x2_t zn, svfloat16_t zm, uint64_t imm_idx) void svmla_lane_za16[_f16]_vg1x4(uint32_t slice, svfloat16x4_t zn, svfloat16_t zm, uint64_t imm_idx) void svmls_lane_za16[_f16]_vg1x2(uint32_t slice, svfloat16x2_t zn, svfloat16_t zm, uint64_t imm_idx) void svmls_lane_za16[_f16]_vg1x4(uint32_t slice, svfloat16x4_t zn, svfloat16_t zm, uint64_t imm_idx) as well as the corresponding `_bf16` variants.
-
Paul Walker authored
Remove DAG combine that is performing type legalisation and instead add isel patterns for all legal types.
-
David Spickett authored
It was pointed out that ordering is crucial here, so note that. I also looked into using a vector instead, as described in https://llvm.org/docs/ProgrammersManual.html#dss-sortedvectorset. Which this is in theory perfect for, but we have at least 2 places that update the map and both would need to sort/unique each time. Plus this code is pretty bug prone. If there is future refactoring it's one thing to consider.
-
cor3ntin authored
We stack allocated an OpaqueExpr that would be used after it was destroyed. e.g https://lab.llvm.org/buildbot/#/builders/57/builds/34909
-
Abid Qadeer authored
A customer reported an issue which I have reduced to the test in the PR. If built with debug info enabled, the build fails with the following error in the verifier. !dbg attachment points at wrong subprogram for function The problem happened because some of the functions in OMPIRBuilder.cpp updated the insertion point with the passed in location but did not change the current debug location. This caused a stale debug location to be attached to the instruction. I have solved it by replacing restoreIP with updateToLocation which updates both the insertion point and debug location. The updateToLocation is used in many places already, so this PR brings functions that I have changed in line with rest of the file. Slight issue is that I am not checking the return type of updateToLocation as there is no good value I could return in that case. But if we have a condition where updateToLocation will return false, these functions will fail in any case. I have added a test that checks that build does not fail. I was not sure what is the correct location for the test should be. Happy to move it to more appropriate location.
-
Tomas Matheson authored
-
David Green authored
[DAG][AArch64] Handle vscale addressing modes in reassociationCanBreakAddressingModePattern (#89908) reassociationCanBreakAddressingModePattern tries to prevent bad add reassociations that would break adrressing mode patterns. This adds support for vscale offset addressing modes, making sure we don't break patterns that already exist. It does not optimize _to_ the correct addressing modes yet, but prevents us from optimizating _away_ from them.
-
David Spickett authored
Instead of updating the member of the ObjectFileELF instance. This means that if one object file asks another to parse the symbol table, that first object's can update its address class map with the same changes that the other object did. (I'm not returning a reference to the other object's m_address_class_map member because there may be other things in there not related to the symbol table being parsed) This will fix the code added in https://github.com/llvm/llvm-project/pull/90622 which broke the test `Expr/TestStringLiteralExpr.test` on 32 bit Arm Linux. This happened because we had the program file, then asked for a better object file, which returned the same program file again. This creates a second ObjectFileELF for the same file, so when we tell the second instance to parse the symbol table it actually calls into the first instance, leaving the address class map of the second instance empty. Which caused us to put an Arm breakpoint instuction at a Thumb return address and broke the ability to call mmap.
-
Petr Hosek authored
This is a follow up to #91028.
-
Jack Styles authored
Currently, LLVM enables `-mbranch-protection=standard` as `bti+pac-ret`. To align LLVM with the behaviour in GNU, this has been updated to `bti+pac-ret+pc` when FEAT_PAuth_LR is enabled as an optional feature via the `-mcpu=` options. If this is not enabled, then this will revert to the existing behaviour.
-
Owen Pan authored
-
NAKAMURA Takumi authored
-
NAKAMURA Takumi authored
-
cor3ntin authored
This completes the required language support for P2255R2.
-
Pavel Labath authored
Parsing of '::' scopes in TypeQuery was very naive and failed for names with '::''s in template arguments. Interestingly, one of the functions it was calling (Type::GetTypeScopeAndBasename) was already doing the same thing, and getting it (mostly (*)) right. This refactors the function so that it can return the scope results, fixing the parsing of names like std::vector<int, std::allocator<int>>::iterator. Two callers of GetTypeScopeAndBasename are deleted as the functions are not used (I presume they stopped being used once we started pruning type search results more eagerly). (*) This implementation is still not correct when one takes c++ operators into account -- e.g., something like `X<&A::operator<>::T` is a legitimate type name. We do have an implementation that is able to handle names like these (CPlusPlusLanguage::MethodName), but using it is not trivial, because it is hidden in a language plugin and specific to method name parsing. --------- Co-authored-by:Michael Buch <michaelbuch12@gmail.com>
-
Luke Lau authored
This further splits off #91440 to inch RISCVInsertVSETVLI closer to post vector regalloc. As noted in #91440, most of the diffs are from moving vsetvli insertion after the vxrm/csr insertion passes, but these are getting conflated with the changes from moving to LiveIntervals. One idea was that we could try and remove some of these diffs by manually moving back the vsetvlis past the vxrm/csr instructions. But this meant having to touch up the LiveIntervals again which seemed to lead to even more diffs. This instead just moves RISCVInsertVSETVLI after RISCVInsertReadWriteCSR and RISCVInsertWriteVXRM so we can isolate those changes.
-
Lang Hames authored
The early return added in this commit should have been added in cbf1535c. No test-case: This would require a deliberately injected failure in a remote-JIT test and we don't have the infrastructure for that at the moment. rdar://126772381
-
Kazu Hirata authored
I'm planning to remove StringRef::equals in favor of StringRef::operator==. - StringRef::operator==/!= outnumber StringRef::equals by a factor of 13 under clang/ in terms of their usage. - The elimination of StringRef::equals brings StringRef closer to std::string_view, which has operator== but not equals. - S == "foo" is more readable than S.equals("foo"), especially for !Long.Expression.equals("str") vs Long.Expression != "str". -
Danny Mösch authored
-
Phoebe Wang authored
[X86][Driver] Do not add `-evex512` for `-march=native` when the target doesn't support AVX512 (#91694)
-
Chaitanya authored
This moves some of the utility methods from amdgpu-lower-module-lds pass to AMDGPUMemoryUtils.
-
Ryosuke Niwa authored
This PR adds the support for determining the origin of a pointer in a conditional operator. Because such an expression can have two distinct origins each of which needs to be visited, this PR refactors tryToFindPtrOrigin to take a callback instead of returning a pair. The callback is called for the second operand and the third operand of the conditioanl operator (i.e. E2 and E3 in E1 ? E2 : E3). Also treat nullptr and integer literal as safe pointer origins in the local variable checker.
-
Mircea Trofin authored
-
Tom Stellard authored
We were accidentally setting the GITHUB_TOKEN environment variable in the previous step.
-
Tom Stellard authored
This is the recommend best practice and we also don't need write access for all jobs.
-
Craig Topper authored
hasExtension check isSupportedExtension before the map lookup. All of the extensions we check for in updateCombination should be valid extension names so we can bypass that to save some time.
-
Kareem Ergawy authored
-
Luke Lau authored
vmerge.vxm allows us to splat the true operand of a select, so sink it where possible to reduce vector register pressure.
-
alx32 authored
FIxing the address sanitizer issue reported in https://github.com/llvm/llvm-project/pull/91548 . The problem comes from the assignment `auto bodyData = newSectionData` which defaults to `SmallVector<uint8_t> data = newSectionData` - which actually creates a copy of the data, placed on the stack. By explicitly using `ArrayRef` instead, we make sure that the original copy is used. We also change the assignment in `ObjcCategoryMerger::newStringData` from `auto` to `SmallVector<uint8_t> &` to make it explicit.
-
Mircea Trofin authored
Follow-up from PR #91669.
-