- Sep 03, 2021
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gbreynoo authored
This reapplies 71d7fed3 which was reverted by 3e2bd82f. This change includes the fix for breaking the sanitizer bots. As seen in https://bugs.llvm.org/show_bug.cgi?id=48880 the current implementation for parsing grouped short options can return unclear error messages. This change fixes the example given in the ticket in which a flag is incorrectly given an argument. Also when parsing a group we now keep reading past the first incorrect option and output errors for all incorrect options in the group. Differential Revision: https://reviews.llvm.org/D108770
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Dmitry Preobrazhensky authored
Corrected list of available register tuples to reflect changes introduced by commits https://reviews.llvm.org/D103672 and https://reviews.llvm.org/D103800 See bug https://bugs.llvm.org/show_bug.cgi?id=51388
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Justas Janickas authored
Adds support for a feature macro `__opencl_c_fp64` in C++ for OpenCL 2021 enabling a respective optional core feature from OpenCL 3.0. This change aims to achieve compatibility between C++ for OpenCL 2021 and OpenCL 3.0. Differential Revision: https://reviews.llvm.org/D108989
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Siger Yang authored
This commit causes buildbot failures if SWIG is available but Lua is not present. This reverts commit 7bb42dc6.
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Florian Mayer authored
This is important as with exceptions enabled, non-POD allocas often have two lifetime ends: the exception handler, and the normal one. Reviewed By: eugenis Differential Revision: https://reviews.llvm.org/D108365
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LLVM GN Syncbot authored
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Stefan Gränitz authored
Set up basic infrastructure for 64-bit ARM architecture support in JITLink. It allows for loading a minimal object file and resolving a single relocation. Advanced features like GOT and PLT handling or relaxations were intentionally left out for the moment. This patch follows the idea to keep implementations for ARM (32-bit) and Aaarch64 (64-bit) separate, because: * it might be easier to share code with the MachO "arm64" JITLink backend * LLVM has individual targets for ARM and Aaarch64 as well Reviewed By: lhames Differential Revision: https://reviews.llvm.org/D108986
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Jingu Kang authored
It fixes https://bugs.llvm.org/show_bug.cgi?id=51700 Differential Revision:
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Rainer Orth authored
The Solaris buildbots have been broken for some time: In file included from /opt/llvm-buildbot/home/solaris11-amd64/clang-solaris11-amd64/llvm/compiler-rt/lib/asan/asan_interceptors.cpp:174: /opt/llvm-buildbot/home/solaris11-amd64/clang-solaris11-amd64/llvm/compiler-rt/lib/asan/../sanitizer_common/sanitizer_common_interceptors.inc:4000:19: error: use of undeclared identifier 'wordexp_wrde_dooffs' ((flags & wordexp_wrde_dooffs) ? p->we_offs : 0) + p->we_wordc; ^ This was caused by D108646 <https://reviews.llvm.org/D108646>; the fix is equivalent to D108838 <https://reviews.llvm.org/D108838>. Tested on `amd64-pc-solaris2.11` and `sparcv9-sun-solaris2.11`. Differential Revision: https://reviews.llvm.org/D109193 -
Cullen Rhodes authored
A small subset of the NEON instruction set is legal in streaming mode. This patch adds support for the following vector to integer move instructions: 0x00 1110 0000 0001 0010 11xx xxxx xxxx # SMOV W|Xd,Vn.B[0] 0x00 1110 0000 0010 0010 11xx xxxx xxxx # SMOV W|Xd,Vn.H[0] 0100 1110 0000 0100 0010 11xx xxxx xxxx # SMOV Xd,Vn.S[0] 0000 1110 0000 0001 0011 11xx xxxx xxxx # UMOV Wd,Vn.B[0] 0000 1110 0000 0010 0011 11xx xxxx xxxx # UMOV Wd,Vn.H[0] 0000 1110 0000 0100 0011 11xx xxxx xxxx # UMOV Wd,Vn.S[0] 0100 1110 0000 1000 0011 11xx xxxx xxxx # UMOV Xd,Vn.D[0] Only the zero index variants are legal, all others indexes are illegal. To support this, new instructions are defined specifically for zero index which is hardcoded, along an implicit 'VectorIndex0' operand. Since the index operand is implicit and takes no bits in the encoding, custom decoding is required to add the operand. I'm not sure if this is the best approach but the predicate constraint on a subset of an operand is unusual. Would be interested to hear some alternatives. The instructions are predicated on 'HasNEONorStreamingSVE', i.e. they're enabled by either +neon or +streaming-sve. This follows on from the work in D106272 to support the subset of SVE(2) instructions that are legal in streaming mode. Depends on D107902. Reviewed By: sdesmalen Differential Revision: https://reviews.llvm.org/D107903
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Cullen Rhodes authored
Reviewed By: sdesmalen Differential Revision: https://reviews.llvm.org/D109135
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Diana Picus authored
Grab whatever ProgramStart has stored in executionEnvironment.argc and subtract 1 (based on the assumption that ProgramStart is called with a C-style argc that counts the command name as an argument). Spoiler alert: The tests will evolve into fixtures when we implement GET_COMMAND_ARGUMENT etc. Differential Revision: https://reviews.llvm.org/D109048
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Siger Yang authored
Due to CMake cache, find_package in FindLuaAndSwig.cmake will be ignored. This commit adds EXACT and REQUIRED flags to it and removes find_package in Lua ScriptInterpreter. Signed-off-by:
Siger Yang <sigeryeung@gmail.com> Reviewed By: tammela, JDevlieghere Differential Revision: https://reviews.llvm.org/D108515
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Diana Picus authored
We should only need to spell the language out in .h files. Differential Revision: https://reviews.llvm.org/D109138
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Michał Górny authored
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Jean Perier authored
DialectAsmParser::parseKeyword is rejecting `'i' digit+` while it is a valid identifier according to mlir/docs/LangRef.md. Integer types actually used to be TOK_KEYWORD a while back before the change: https://github.com/llvm/llvm-project/commit/6af866c58d21813fb243906611d02bb2a8ffa43a. This patch Modifies `isCurrentTokenAKeyword` to return true for tokens that match integer types too. The motivation for this change is the parsing of `!fir.type<{` `component-name: component-type,`+ `}>` type in FIR that represent Fortran derived types. The component-names are parsed as keywords, and can very well be i32 or any ixxx (which are valid Fortran derived type component names). The Quant dialect type parser had to be modified since it relied on `iw` not being parsed as keywords. Differential Revision: https://reviews.llvm.org/D108913
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Jean Perier authored
The size of common block should be extended to cover any storage sequence that are storage associated with the common block via equivalences (8.10.2.2 point 1 (2)). In symbol size and offset computation, the size of the common block was not always extended to cover storage association. It was only done if the "base symbol of an equivalence group"(*) appeared in a common block statement. Correct this to cover all cases where a symbol appearing in a common block statement is storage associated. (*) the base symbol of an equivalence group is the symbol whose storage starts first in a storage association (if several symbols starts first, the base symbol is the last one visited by the algorithm going through the equivalence sets). Differential Revision: https://reviews.llvm.org/D109156
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Max Kazantsev authored
We can fold loop phis after we've proved that some exit has EC=0 in IndVars. Patch by Dmitry Makogon!
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Yuichi Yoshida authored
Fixed a minor writing error. The text was hard to understand. Reviewed By: lhames, mehdi_amini Differential Revision: https://reviews.llvm.org/D106235
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Amara Emerson authored
This allows selection like: eor w0, w1, w2, ror #8 Saves 500 bytes on ClamAV -Os, which is 0.1%. Differential Revision: https://reviews.llvm.org/D109206
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Qiu Chaofan authored
This patch basically enables fast-isel for AIX 64-bit subtarget (previously enabled only for ELF 64). The initial motivation is to introduce branch folding to AIX generated code for correct debug behavior. I also saw some compiling time improvement in a few LLVM test-suite benchmarks. (toast, dbms, cjpeg, burg, etc.) Reviewed By: jsji Differential Revision: https://reviews.llvm.org/D98844
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Chen Zheng authored
This causes https://bugs.llvm.org/show_bug.cgi?id=51714 and is not a right patch according to comments in D91724 This reverts commit 42eaf4fe.
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Matt Arsenault authored
There's no reason to make this an explicit feature, since it's implied by the lack of a feature with a size.
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Chuanqi Xu authored
Summary: Now in libcxx and clang, all the coroutine components are defined in std::experimental namespace. And now the coroutine TS is merged into C++20. So in the working draft like N4892, we could find the coroutine components is defined in std namespace instead of std::experimental namespace. And the coroutine support in clang seems to be relatively stable. So I think it may be suitable to move the coroutine component into the experiment namespace now. But move the coroutine component into the std namespace may be an break change. So I planned to split this change into two patch. One in clang and other in libcxx. This patch would make clang lookup coroutine_traits in std namespace first. For the compatibility consideration, clang would lookup in std::experimental namespace if it can't find definitions in std namespace and emit a warning in this case. So the existing codes wouldn't be break after update compiler. Test Plan: check-clang, check-libcxx Reviewed By: lxfind Differential Revision: https://reviews.llvm.org/D108696
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Alexander Pivovarov authored
Add SiFive core s51 as rv64imac RocketModel Reviewed-By: MaskRay, evandro Differential Revision: https://reviews.llvm.org/D108886
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PeixinQiao authored
Add support for ordered directive in the OpenMPIRBuilder. This patch also modidies clang to use the ordered directive when the option -fopenmp-enable-irbuilder is enabled. Also fix one ICE when parsing one canonical for loop with the relational operator LE or GE in openmp region by replacing unary increment operation of the expression of the variable "Expr A" minus the variable "Expr B" (++(Expr A - Expr B)) with binary addition operation of the experssion of the variable "Expr A" minus the variable "Expr B" and the expression with constant value "1" (Expr A - Expr B + "1"). Reviewed By: Meinersbur, kiranchandramohan Differential Revision: https://reviews.llvm.org/D107430
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Usman Nadeem authored
Change-Id: Ida45fc41231cd71709048f2d37f228f14053514e
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Usman Nadeem authored
This reverts commit 8749a556.
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Anna Thomas authored
The attached testcase crashes without the patch (Not the same accesses in the same order). When we move instructions before another instruction, we also need to update the memory accesses corresponding to it. Reviewed-By: asbirlea Differential Revision: https://reviews.llvm.org/D109197
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Alexander Pivovarov authored
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Matthias Springer authored
The limitation on iter_args introduced with D108806 is too restricting. Changes of the runtime type should be allowed. Extends the dim op canonicalization with a simple analysis to determine when it is safe to canonicalize. Differential Revision: https://reviews.llvm.org/D109125
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Stella Laurenzo authored
* Now that packaging has stabilized, removes old mechanisms for loading extensions, preferring direct importing. * Removes _cext_loader.py, _dlloader.py as unnecessary. * Fixes the path where the CAPI dll is written on Windows. This enables that path of least resistance loading behavior to work with no further drama (see: https://bugs.python.org/issue36085). * With this patch, `ninja check-mlir` on Windows with Python bindings works for me, modulo some failures that are actually due to a couple of pre-existing Windows bugs. I think this is the first time the Windows Python bindings have worked upstream. * Downstream changes needed: * If downstreams are using the now removed `load_extension`, `reexport_cext`, etc, then those should be replaced with normal import statements as done in this patch. Reviewed By: jdd, aartbik Differential Revision: https://reviews.llvm.org/D108489
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Stanislav Mekhanoshin authored
Differential Revision: https://reviews.llvm.org/D109201
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Xun Li authored
verifyFunction can be really slow on large functions. This can significantly slow down compilation in production. Given that coroutine passes are fairly stable now, we should only run it in debug mode. Differential Revision: https://reviews.llvm.org/D109198
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Wenlei He authored
When pre-inliner decision is used for CSSPGO, we should take that into account for ThinLTO importing as well, so post-link sample loader inliner can favor that decision. This is handled by a small tweak in this patch. It also includes a change to transfer preinliner decision when merging context. Differential Revision: https://reviews.llvm.org/D109088
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Stanislav Mekhanoshin authored
Peephole works before the first SIFoldOperands so most of the immediates are in registers. Differential Revision: https://reviews.llvm.org/D109186
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Sam Clegg authored
This ISD node/wrapper represents am address which is relative to a base address and therefore lowers to `i32.const` rather than `global.get`. Use this wrapper type for TLS-relative addresses, paving the way for the non-REL wrapper to be used to external TLS address once those are supported. Differential Revision: https://reviews.llvm.org/D109179
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Philip Reames authored
This patch adds support for unrolling inner loops using epilogue unrolling. The basic issue is that the original latch exit block of the inner loop could be outside the outer loop. When we clone the inner loop and split the latch exit, the cloned blocks need to be in the outer loop. Differential Revision: https://reviews.llvm.org/D108476
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Philip Reames authored
Requested in review comment on D108476
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Ron Lieberman authored
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