Fix the pseudos to have the correct size in the MCInstrDesc description.

Inspired by D118009 and D117970.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D118175

No need to reorder the top nodes, if they are not stores or
insertelement instructions and each node should be analized only
once, when the bottom-to-top analysis is performed.
We still endup with extractelements for the top node scalars and
the final shuffle just adds an extra cost and currently
crashes the compiler for PHI nodes.

Differential Revision: https://reviews.llvm.org/D116760

In glibc before 2.33, include/sys/stat.h defines fstat/fstat64 to
`__fxstat/__fxstat64` and provides `__fxstat/__fxstat64` in libc_nonshared.a.
The symbols are glibc specific and not needed on other systems.

Reviewed By: vitalybuka, #sanitizers

Differential Revision: https://reviews.llvm.org/D118423

If we have a vector FP division with a splatted divisor, use
getVectorMinNumElements when scaling the num of uses by splat factor.

For AArch64 the combine kicks in for the <vscale x 4 x float> case since it's
above the fdiv threshold (3) when scaling num uses by splat factor, but the
codegen is worse (splat + vector fdiv + vector fmul) than the <vscale x 2 x
double> case (splat + vector fdiv).

If the combine could be converted into a scalar FP division by
scalarizeBinOpOfSplats it may be cheaper, but it looks like this is predicated
on the isExtractVecEltCheap TLI function which is implemented for x86 but not
AArch64. Perhaps for now combineRepeatedFPDivisors should only scale num uses
by splat if the division can be converted into scalar op.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D118343

Add Thread::GetSiginfo() and SBThread::GetSiginfo() methods to retrieve
the siginfo value from server.

Differential Revision: https://reviews.llvm.org/D118055

When `-fno-integrated-as` is in effect (the default on AIX) the cc1 job produces a `.s` file instead. This patch adapts the test to accept `.s` or `.o` files.

Reviewed By: jansvoboda11

Differential Revision: https://reviews.llvm.org/D118152

This patch introduces a class LexSimplex that can currently be used to find the
lexicographically minimal rational point in an IntegerPolyhedron. This is a
series of patches leading to computing the lexicographically minimal integer
lattice point as well parametric lexicographic minimization.

Reviewed By: Groverkss

Differential Revision: https://reviews.llvm.org/D117437

We can pass this test now thanks to recent changes that allow us to use PGO without LTO, so un-XFAIL the test and update the comments.

Differential Revision: https://reviews.llvm.org/D118474

Differential Revision: https://reviews.llvm.org/D118265

`__gnu_h2f_ieee` and `__gnu_f2h_ieee` are introduce by ARM and set that as
default name for fp16 and fp32 conversion in LLVM.

However RISC-V GCC using default naming scheme for that, which is
`__extendhfsf2` and `__truncsfhf2` for that, that cause runtime ABI
incompatible issue.

Although we didn't have formal runtime ABI spec to specify those naming
convention yet, but I think it would be great to fix the incompatible
issue first.

And I've plan to create a runtime ABI spec undere psABI spec this year.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D118207

detatch -> detach. As this requires touching all uses, also
lower-case it in accordance with the style guide.

Now that loads always have an alignment, we should not perform an
ABI alignment fallback here.

extract_vec_elt (load X), C --> scalar load (X+C)

As noted in the comment, DAGCombiner has this fold -- and the code in this
patch is adapted from DAGCombiner::scalarizeExtractedVectorLoad() -- but
x86 should benefit even if the loaded vector has other uses as long as we
apply some other x86-specific conditions. The motivating example from #50310
is shown in vec_int_to_fp.ll.

Fixes #50310

Differential Revision: https://reviews.llvm.org/D118376

Where the instruction mnemonic contains a dot, we name the corresponding
instruction in the .td file using a _ in the place of the dot. e.g. LR_W
rather than LRW. This commit updates RISCVInstrInfoZb.td to follow that
convention.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D118334

We should abort this walk if we hit any instruction that is not
guaranteed to transfer.

In this case, we have no guarantee that the load is unconditionally
executed, so the argument promotion is not legal.

Shiny new DBG_PHI instruction usually have physical registers as operands
-- however, the machine verifier checks to see whether they're live, and
occasionally this fails. There's a filter for DBG_VALUE instructions to not
get verified in this way: expand it to exempt all debug instructions from
liveness checking, which means DBG_PHIs get treated like DBG_VALUEs.

This also future proofs against us adding new debug instructions.

Differential Revision: https://reviews.llvm.org/D117891

If we don't demand the upper elements of the 256-bit vector, then just perform as a 128-bit vector

As suggested on D117898

Differential Revision: https://reviews.llvm.org/D118464

This function used to be shared with the Attributor, but can now
be made private.

This patch updates how splat loads handled and is an extension of D106555.

Particularly, for v2i64/v4f32/v4i32 types, they are updated to handle only
non-extending loads. For v8i16/v16i8 types, they are updated to handle extending
loads only if the memory VT is the same vector element VT type.

A test case has been added to illustrate a scenario where a PPCISD::LD_SPLAT
node should not be produced. In this test, it depicts the following f64
extending load used in a v2f64 build vector, but the extending load is actually
used in more places other than the build vector (such as in t12 and t16).
```
Type-legalized selection DAG: %bb.0 'test:entry'
SelectionDAG has 20 nodes:
  t0: ch = EntryToken
  t4: i64,ch = CopyFromReg t0, Register:i64 %1
  t6: i64,ch = CopyFromReg t0, Register:i64 %2
  t11: f64,ch = load<(load (s64) from %ir.b, !tbaa !7)> t0, t4, undef:i64
        t16: f64 = fadd t31, t37
      t34: ch = store<(store (s64) into %ir.c, !tbaa !7)> t31:1, t16, t6, undef:i64
    t36: ch = TokenFactor t34, t37:1
    t27: v2f64 = BUILD_VECTOR t37, t37
  t22: ch,glue = CopyToReg t36, Register:v2f64 $v2, t27
      t12: f64 = fadd t11, t37
    t28: ch = store<(store (s64) into %ir.b, !tbaa !7)> t11:1, t12, t4, undef:i64
  t31: f64,ch = load<(load (s64) from %ir.c, !tbaa !7)> t28, t6, undef:i64
    t2: i64,ch = CopyFromReg t0, Register:i64 %0
  t37: f64,ch = load<(load (s32) from %ir.a, !tbaa !3), anyext from f32> t0, t2, undef:i64
  t23: ch = PPCISD::RET_FLAG t22, Register:v2f64 $v2, t22:1
```

Differential Revision: https://reviews.llvm.org/D117803

When a comparison is extended and it would be free to extend the
arguments to that comparison, we can propagate the extend into those arguments.
This prevents extra instructions being generated to extend the result of the
comparison, which is not free to extend.

This is a resubmission of D116812 with fixes that need another review.

Differential Revision: https://reviews.llvm.org/D118139

Fixes a false positive that occurs when a user-implemented memmove is
instrumented by HWASan.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D118180

This is a minimal test to show a transform proposed in D118376.

Fix buildbot failure https://lab.llvm.org/buildbot/#/builders/160

Using a _BitInt (or _ExtInt) type as a block parameter or block return
type hits an "unreachable" when trying to determine the encoding for
the block. Instead of crashing, this patch handles it like some of the
other types for which we don't yet have an encoding. The test case
verifies we no longer crash, but does not verify that we provide any
particular encoding (it can be updated once someone more familiar with
ObjC steps in to define the encoding).

Fixes PR50503.

[X86] combineSetCCMOVMSK - don't fold MOVMSK(BITCAST(PCMPEQ(X,0))) -> PTESTZ(X,X) if we're not testing every element comparison

We can't fold MOVMSK(BITCAST(PCMPEQ(X,0))) -> PTESTZ(X,X) if we're not testing every element comparison

Adds patterns of the form "(and a, (not b)) -> bic".

NOTE: With this support I'm inclined to remove AArch64ISD::BIC,
but will leave that investigation for another time.

Differential Revision: https://reviews.llvm.org/D118365

This commutative test could be optimised into:
  index z0.d, x0, x1

But currently isn't yet.

This updates NewGVN test cases that were running
  "opt -basic-aa -newgvn ..."
to run
  "opt -passes=newgvn ..."
instead.

The pipeline will be more similar to what we used to have with
legacy PM by doing it this way. The compatility mode that we've
been using for awhile during transition from legacy PM to new PM,
i.e. using the legacy syntax together with new PM, has resulted in
a pipeline such as
  -passes='function(require<basic-aa>),function(newgvn)'
but running the analysis in a separate function pass manager seem
overly complicated for these tests.

Another difference is that we will get the default aa-pipeline instead
of only running basic-aa. That might be a bit questioned (given that
the tests originally specified basic-aa). The output is however
identival for all the test cases modified here regardless of using
basic-aa or the default aa-pipeline.

This is also another small step towards removal of the support for
using the legacy PM syntax in opt.

Differential Revision: https://reviews.llvm.org/D118340

Use the new PM syntax when specifying the pipeline in regression
tests previously running
  "opt -newgvn ..."

Instead we now do
  "opt -passes=newgvn ..."

Notice that this also changes the aa-pipeline to become the default
aa-pipeline instead of just basic-aa. Since these tests haven't been
explicitly requesting basic-aa in the past (compared to the test cases
updated in a separate patch involving "-basic-aa -newgvn") it is
assumed that the exact aa-pipeline isn't important for the validity
of the test cases. An alternative could have been to add
-aa-pipeline=basic-aa as well to the run lines, but that might just
add clutter in case the test cases do not care about the aa-pipeline.

This is another step to move away from the legacy PM syntax when
specifying passes in opt.

Differential Revision: https://reviews.llvm.org/D118341

These splats -- whether BUILD_VECTOR or SPLAT_VECTOR -- are formed by
first extracting a value from a vector and splatting it to all elements
of the destination vector. These could be performed more optimally,
avoiding the drop to scalar, using RVV's vrgather, for example.

The LMULMAX check names didn't match the options we were passing to llc
(they were swapped around) and we were silently missing coverage for one
test which differs between RV32 and RV64.

This patch introduces a new options for script llvm-mca-compare.py
(-plot-resource-pressure, -plot) to draw plots for llvm-mca tool
statistics and option (--plot-path) to specify relative path where
you want to save the plots.

Differential Revision: https://reviews.llvm.org/D115718

Previous folds by combineSetCCMOVMSK might have converted these to CMP when changing the bitwidth, and the CMP->SUB fold might not have happened (or will happen)