Fix https://github.com/llvm/llvm-project/issues/59597.
mov w8, w0 + fmov d0, x8 ==> fmov s0, w0

Reviewed By: dmgreen, efriedma

Differential Revision: https://reviews.llvm.org/D140649

The current implementation unconditionally appends the system path separator with the filename to the include directory. This is not correct in edge cases however, such as when specifying `/` as include directory (on Unix systems) or just `\` on Windows.
This patch fixes that by using `sys::path::append`, which already has the required logic to correctly implement this.

While this is technically only a change in the `SourceMgr` class, I think the main user of that class, and the include mechanism, is TableGen.
No test attached because no behavioral difference is observable without trying to access the root directory of the users filesystem.

The motivation for this change is a rather funny story, as this actually fixes a performance problem when running `check-mlir` on Windows.
Some tests for `mlir-pdll-lsp-server` lead to adding `\` as include directory in TableGen (which is a valid absolute path on Windows!). Due to the unconditional append, the created filepath would then be of the form `\\<dir>\...` which is also a valid path on Windows, but is a network path. On my machine it'd then attempt to access the network and find a machine with the name `<dir>` and the file there. This call would take several seconds, leading to some tests in `mlir-pdll-lsp-server` taking 2 minutes on my machine.

Running `check-mlir` after this patch reduces the runtime on my machine from 161 seconds to 6 seconds.

Differential Revision: https://reviews.llvm.org/D141220

Snippet is a tiny live interval which has copy or fill like def
and copy or spill like use at the end (any of them might abcent).

Snippet has only one use/def inside interval and interval is located
in one basic block.

When inline spiller spills some reg around uses it also forces the
spilling of connected snippets those which got by splitting the
same original reg and its def is a full copy of our reg or its
last use is a full copy to our reg.

The definition of snippet is extended to allow not only one use/def
but more. However all other uses are statepoint instructions which will
fold fill into its operand. That way we do not introduce new fills/spills.

Reviewed By: qcolombet, dantrushin
Differential Revision: https://reviews.llvm.org/D138093

Fix DEBUG_TYPE for AffineOps.cpp. NFC.

Differential Revision: https://reviews.llvm.org/D141252

1. Refactor for costs of sqrt/fabs
2. Add half type support for the cost model of sqrt/fabs

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D132908

The test in 08f95780 may fail in armv8 since the signature
of the constructor may be different. This patch tries to fix it.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D132999

Closes https://github.com/llvm/llvm-project/issues/59765.

Currently we will generate the global ctor/dtor for variables in
importing modules. It will cause multiple initialization/destructions.
It makes no sense. This patch tries to not generate global ctor/dtor for
variables which are available externally. Note that the variables in
header units and clang modules won't be available externally by default.

Reviewed By: iains

Differential Revision: https://reviews.llvm.org/D140867

Close https://github.com/llvm/llvm-project/issues/59601.

This is actually a workaround for the issue. See the comments and the
test for example. The proper fix should make the placement allocation
functions acceptable based on the context. But it is harder and more
complex on the one side. On the other side, such workaround won't be too
bad in practice since users rarely call the placement allocation
functions directly.

So personally I prefer to address such problems in the simpler way.

Reviewed By: royjacobson

Differential Revision: https://reviews.llvm.org/D141023

Follow up https://reviews.llvm.org/D139408, support `and/or+select` patterns
X && Z || Y && Z --> (X || Y) && Z
https://alive2.llvm.org/ce/z/EMCkBG
https://alive2.llvm.org/ce/z/Q-YRvr
https://alive2.llvm.org/ce/z/SFkVQc
https://alive2.llvm.org/ce/z/S9MCuJ
https://alive2.llvm.org/ce/z/KZ7zzz

(X || Z) && (Y || Z) --> (X && Y) || Z
https://alive2.llvm.org/ce/z/Ggpa8-
https://alive2.llvm.org/ce/z/nhQRLY
https://alive2.llvm.org/ce/z/zpmEnq
https://alive2.llvm.org/ce/z/7omsrf
https://alive2.llvm.org/ce/z/CWBzBp

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D139630

This patch fixes:

  llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp:1220:13: error:
  unused function 'locStr' [-Werror,-Wunused-function]

Remove globals from the lldCOFF library, by moving globals into a context class.
This patch mostly moves the config object into COFFLinkerContext.

See https://lists.llvm.org/pipermail/llvm-dev/2021-June/151184.html for
context about removing globals from LLD.

Reviewed By: aganea

Differential Revision: https://reviews.llvm.org/D110450

* The reference type of `common_input_iterator<const int*>` can't be `int&`, because an lvalue of type `const int` _can't_ bind to an `int&`. Fix by changing the return type of `operator*` to `decltype(auto)` to make it fully generic.
* `range.zip/iterator/compare.pass.cpp` verifies that the iterators of a `zip_view` don't support `<=>` when the underlying iterators do not; this is not true after LWG-3692.
* libc++ doesn't yet implement P2165R4 "Compatibility between tuple, pair and tuple-like objects", so the tests expect `zip_view` to use `pair` in places where the working draft requires `tuple`.

Differential Revision: https://reviews.llvm.org/D141216

Reviewed By: benshi001

Differential Revision: https://reviews.llvm.org/D141176

Implement double precision log10 function correctly rounded for all
rounding modes.  This implementation currently needs FMA instructions for
correctness.

Use 2 passes:
Fast pass:
- 1 step range reduction with a lookup table of `2^7 = 128` elements to reduce the ranges to `[-2^-7, 2^-7]`.
- Use a degree-7 minimax polynomial generated by Sollya, evaluated using a mixed of double-double and double precisions.
- Apply Ziv's test for accuracy.
Accurate pass:
- Apply 5 more range reduction steps to reduce the ranges further to [-2^-27, 2^-27].
- Use a degree-4 minimax polynomial generated by Sollya, evaluated using 192-bit precisions.
- By the result of Lefevre (add quote), this is more than enough for correct rounding to all rounding modes.

In progress: Adding detail documentations about the algorithm.

Depend on: https://reviews.llvm.org/D136799

Reviewed By: zimmermann6

Differential Revision: https://reviews.llvm.org/D139846

This patch introduces a new AA `AAUnderlyingObjects`. It is basically like a wrapper
AA of the function `AA::getAssumedUnderlyingObjects`, but it can recursively do
query if the underlying object is an indirect access, such as a phi node or a select
instruction.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D141164

This patch adds a `SymbolTableAnalysis` that can be used with the
analysis manager. It contains a symbol table collection. This analysis
allows symbol tables to be preserved across passes so that they do not
need to be recomputed. The analysis assumes it remains valid because
most transformations automatically keep symbol tables up-to-date using
its `insert` and `erase` methods.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D139666

This commit adds compiler-rt cmake option COMPILER_RT_DISABLE_AARCH64_FMV
which, when enabled, doesn't include function multiversioning features
initilization code in 'builtins' build.

Differential Revision: https://reviews.llvm.org/D141199

This pseudo-instruction stores two small (8-bit) registers into one wide
(16-bit) register. But apparently the order matters a lot to the
register allocator.
This patch changes the order of inserting the registers to optimize for
the best register allocation in the tests of shift32.ll. It might be
detrimental in other cases, but keeping the registers in the same
physical register seems like it would be a common case.

Differential Revision: https://reviews.llvm.org/D140573

This optimization turns shifts of almost a multiple of 8 into a shift
into the opposite direction. Unfortunately it doesn't compose well with
the other optimizations (I've tried) so it's separate from them.

Differential Revision: https://reviews.llvm.org/D140572

This uses a complicated shift sequence that avr-gcc also uses, but
extended to work over any number of bytes and in both directions
(logical shift left and logical shift right). Unfortunately it can't be
used for an arithmetic shift right: I've tried to come up with a
sequence but couldn't.

Differential Revision: https://reviews.llvm.org/D140571

This patch optimizes 32-bit constant shifts by renaming registers. This
is very effective as the compiler would otherwise need to do a lot of
single bit shift instructions. Instead, the registers are renamed at the
SSA level which means the register allocator will insert the necessary
mov instructions.

Unfortunately, the register allocator will insert some unnecessary movs
with the current code. This will be fixed in a later patch.

Differential Revision: https://reviews.llvm.org/D140570

32-bit shift instructions were previously expanded using the default
SelectionDAG expander, which meant it used 16-bit constant shifts and
ORed them together. This works, but is far from optimal.

I've optimized 32-bit shifts on AVR using a custom inserter. This is
done using three new pseudo-instructions that take the upper and lower
bits of the value in two separate 16-bit registers and outputs two
16-bit registers.

This is the first commit in a series. When completed, shift instructions
will take around 31% less instructions on average for constant 32-bit
shifts, and is in all cases equal or better than the old behavior. It
also tends to match or outperform avr-gcc: the only cases where avr-gcc
does better is when it uses a loop to shift, or when the LLVM register
allocator inserts some unnecessary movs. But it even outperforms avr-gcc
in some cases where avr-gcc does not use a loop.

As a side effect, non-constant 32-bit shifts also become more efficient.

For some real-world differences: the build of compiler-rt I use in
TinyGo becomes 2.7% smaller and the build of picolibc I use becomes 0.9%
smaller. I think picolibc is a better representation of real-world code,
but even a ~1% reduction in code size is really significant.

The current patch just lays the groundwork. The result is actually a
regression in code size. Later patches will use this as a basis to
optimize these shift instructions.

Differential Revision: https://reviews.llvm.org/D140569

Integer legalization already supported splitting the output integer of
llround and llrint, but did not support this for lround and lrint yet.
This is not a problem for 32-bit architectures, but for 8/16-bit
architectures like AVR it results in a crash like this:

    ExpandIntegerResult #0: t7: i32 = lround t6

    LLVM ERROR: Do not know how to expand the result of this operator!

This patch simply add lrint/lround to the list of ISD opcodes to expand.

Fixes https://github.com/llvm/llvm-project/issues/59573.

Differential Revision: https://reviews.llvm.org/D140822

These two symbols are declared in object files to indicate whether .data
needs to be copied from flash or .bss needs to be cleared. They are
supported on avr-gcc and reduce firmware size a bit, which is especially
important on very small chips.

I checked the behavior of avr-gcc and matched it as well as possible.
From my investigation, it seems to work as follows:

__do_copy_data is set when the compiler finds a data symbol:
  * without a section name
  * with a section name starting with ".data" or ".gnu.linkonce.d"
  * with a section name starting with ".rodata" or ".gnu.linkonce.r" and
    flash and RAM are in the same address space

__do_clear_bss is set when the compiler finds a data symbol:
  * without a section name
  * with a section name that starts with .bss

Simply checking whether the calculated section name starts with ".data",
".rodata" or ".bss" should result in the same behavior.

Fixes: https://github.com/llvm/llvm-project/issues/58857

Differential Revision: https://reviews.llvm.org/D140830

Follow-up to:
6c39a3aa

That converted a pattern with ashr directly to icmp+zext, and
this updates the pattern that we used to convert to.

This canonicalizes to icmp for better analysis in the minimum case
and shortens patterns where the source type is not the same as dest type:
https://alive2.llvm.org/ce/z/tpXJ64
https://alive2.llvm.org/ce/z/dQ405O

This requires an adjustment to an icmp transform to avoid infinite looping.

This patch moves the OpenMPOffloadMappingFlags enum definiition from Clang codegen to OMPConstants.h

Differential Revision: https://reviews.llvm.org/D140292

Reviewed By: Mordante, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D141225

Not removing the entries ensures that duplicates are avoided,
reducing the number of iterations.