Differential Revision: https://reviews.llvm.org/D156195

This adds support for the LoongArch ELF psABI v2.00 [1] relocation
model to LLD. The deprecated stack-machine-based psABI v1 relocs are not
supported.

The code is tested by successfully bootstrapping a Gentoo/LoongArch
stage3, complete with common GNU userland tools and both the LLVM and
GNU toolchains (GNU toolchain is present only for building glibc,
LLVM+Clang+LLD are used for the rest). Large programs like QEMU are
tested to work as well.

[1]: https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html

Reviewed By: MaskRay, SixWeining

Differential Revision: https://reviews.llvm.org/D138135

This patch adds the predicate-as-counter registers pn0-pn15 to the
list of supported registers used when writing inline assembly.

Tests added to

  clang/test/CodeGen/aarch64-sve-inline-asm.c

Differential Revision: https://reviews.llvm.org/D156115

After implementation of "[Clang] Implement P2741R3 - user-generated static_assert messages"  (47ccfd7a) the c indexer crashes when handling a `static_assert` w/o any message.
This is caused by using `dyn_cast` to get the literal string, which isn't working on `nullptr`.

Reviewed By: cor3ntin

Differential Revision: https://reviews.llvm.org/D156053

This extends the existing 'arm_sme.tile_store' op to support all tile
sizes and adds a new op 'arm_sme.tile_load', as well as lowerings from
vector -> custom ops and custom ops -> intrinsics. Currently there's no
lowering for i128.

Depends on D154867

Reviewed By: awarzynski, dcaballe

Differential Revision: https://reviews.llvm.org/D155306

IsARMBIgEndian function returns true only if:
  1. The triples are either arm or thumb and the
     commandline has the  option -mbig-endian
  2. The triples are either armeb or thumbeb.

Missing the checking of arm or thumb triples in the
first case pass through the --be8 endian flag to
linker For AArch64 as well which is not expected.
This is the regression happened from the previous
patch https://reviews.llvm.org/D154786.

It is better to refactor to only call IsARMBigEndian
for isARM and isthumb satisfying conditions which
keeps ARM and AArch64 separate.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D155808

[RISCV] Merge rv32/rv64 vector narrowing integer right shift intrinsic tests that have the same content. NFC.

/Users/jiefu/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp:2603:10: error: variable 'CNI' set but not used [-Werror,-Wunused-but-set-variable]
    auto CNI = CI;
         ^
1 error generated.

Similar to D156016 for MapVector.

This reverts commit eea92586.

That commit triggered crashes in the following testcase:

$ cat reduced.c
typedef struct {
  int a[8]
} b;
typedef struct {
  b *c;
  short d
} e;
void f() {
  int g;
  char *h;
  e *i = f;
  short j = i->d;
  int a = i->c->a[0];
  for (;;)
    for (; g < a; g++) {
      *h = j * i->d >> 8;
      h++;
    }
}
$ clang -target aarch64-linux-gnu -w -c -O2 reduced.c

Reduce the scope of some variables.
Replace an if with an assertion.

Reviewed By: kmitropoulou

Differential Revision: https://reviews.llvm.org/D156140

Reviewed By: wangpc

Differential Revision: https://reviews.llvm.org/D156200

similar to D117454, try to add vl patterns and testcases.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D155466

Reviewed By: pengfei, RKSimon, skan

Differential Revision: https://reviews.llvm.org/D155798

Depends on D152706
Solves SWDEV-408279

Reviewed By: #amdgpu, arsenm

Differential Revision: https://reviews.llvm.org/D155699

This allows PromoteAlloca to not be reliant on a second SROA run to remove the alloca completely. It just does the full transformation directly.

Note PromoteAlloca is still reliant on SROA running first to
canonicalize the IR. For instance, PromoteAlloca will no longer handle aggregate types because those should be simplified by SROA before reaching the pass.

Reviewed By: #amdgpu, arsenm

Differential Revision: https://reviews.llvm.org/D152706

It seems preferable to avoid this optimization under -O0, and we're not
set up to emit speculative references to vtables at -O0 in general
anyway.

For #64088.

CUDA and HIP have kernel attributes to tune the code generation (in the
backend). To reuse this functionality for OpenMP target regions we
introduce the `ompx_attribute` clause that takes these kernel
attributes and emits code as if they had been attached to the kernel
fuction (which is implicitly generated).

To limit the impact, we only support three kernel attributes:
`amdgpu_waves_per_eu`, for AMDGPU
`amdgpu_flat_work_group_size`, for AMDGPU
`launch_bounds`, for NVPTX

The existing implementations of those attributes are used for error
checking and code generation. `ompx_attribute` can be attached to any
executable target region and it can hold more than one kernel attribute.

Differential Revision: https://reviews.llvm.org/D156184

SmallVector<*, 0> is often a better replacement for std::vector :
both the object size and the code size are smaller.
(SmallMapVector uses SmallVector as well, but it is not common.)

clang size decreases by 0.0226%.
instructions:u decreases 0.037% when compiling a sqlite3 amalgram.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D156016

Right now std::vector is instantiated with an incomplete element type,
which is ok but best to avoid.

Specify blocks order used in YAML profile. Needed to ensure profile backwards
compatibility with pre-D155514 DFS order by default.

Reviewed By: #bolt, maksfb

Differential Revision: https://reviews.llvm.org/D156176

When building MLIR using bazel on windows with MSVC2019, bool splats
were being created incorrectly:

```
dense<[true,true,true,true]> : tensor<4xi1>
-(parse with mlir-opt)-> dense<[true, false, false, false]> : tensor<4xi1>
```

Appears that a Windows bazel build produces a corrupt DenseIntOrFPElementsAttr.
Unable to repro using MSVC and cmake.

Issue first discovered here:
https://github.com/google/jax/issues/16394

Added test point for reproduction:

```
$ bazel test @llvm-project//mlir/unittests:ir_tests --test_arg=--gtest_filter=DenseSplatTest.BoolSplatSmall
```

Differential Revision: https://reviews.llvm.org/D155745

The cwd of the test might not be writable.

This came up in the context of #63169 - if this assert were in place it
would've been much easier to reduce the test case.

Close https://github.com/llvm/llvm-project/issues/64091

This reverts commit f82df0b2 and add a
test from https://github.com/llvm/llvm-project/issues/64091

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D155784

This patch updates the Clang release notes with the new option
-fkeep-persistent-storage-variables added in bb6ab91b.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D155501

The pass tried to fold in reverse-post-order, but it cause an issue
when a parent is folded before the chilren as they will still be
present in the worklist.
Use reverse-preorder instead here.

Fixes #64089

Reviewed By: #libc, Mordante

Spies: Mordante, aheejin, libcxx-commits

Differential Revision: https://reviews.llvm.org/D156059

Existing notes were not fully correct and were missing a detail:
- `std::vector` was annotated long time ago,
- `std::deque` annotations are new,
- now container annotations were extended to all allocators (support in ASan API exists since LLVM16).

Reviewed By: philnik, #libc

Differential Revision: https://reviews.llvm.org/D156162

Added in D156163

This is a refactoring of:
- SpacesInConditionalStatement
- SpacesInCStyleCastParentheses
- SpaceInEmptyParentheses
- SpacesInParentheses

These are now options under the new Style Option: SpacesInParens. The
existing options are maintained for backward compatibility.

Within SpacesInParens, there are currently options for:
- Never
- Custom

The currently available options for Custom are:
- InConditionalStatements
- InCStyleCasts
- InEmptyParentheses
- Other

Setting InConditionalStatements and Other to true enables the same space
additions as SpacesInParentheses.

This refactoring does not add or remove any existing features, but it makes
it possible to more easily extend and maintain the addition of spaces within
parentheses.

Related to #55428.

Differential Revision: https://reviews.llvm.org/D155239

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D156092

Implement isSExtCheaperThanZExt.

Signed-off-by: WANG Rui <wangrui@loongson.cn>

Differential Revision: https://reviews.llvm.org/D154919

This adds a new AlignConsecutiveShortCaseStatements option in line with the
existing AlignConsecutive* options , which when
AllowShortCaseLabelsOnASingleLine is enabled will align the tokens after the
case statement's colon. This also adds a AlignCaseColons option to allow
aligning the case label colon itself rather than the token after it.

Fixes #55475.

Differential Revision: https://reviews.llvm.org/D151761

This reverts commit 4ba00844.

Add test case showing suboptimal codegen when zero extending.

Signed-off-by: WANG Rui <wangrui@loongson.cn>

Reviewed By: xen0n

Differential Revision: https://reviews.llvm.org/D154918

This reverts commit 4f093b31.