Add myself to CODEOWNERS for the lldb subdirectory.

Discourse discussion: https://discourse.llvm.org/t/usage-of-codeowners-file/73524

Spaces before the `.. option` for a few of these meant
they were indented, as if they were sub-options somehow.

dsymutil is using an excessive amount of memory because it's holding on
to the DWARF Context, even after it's done processing the corresponding
object file. This patch releases the input DWARF after cloning, at which
point it is no longer needed. This has always been the intended
behavior, though I didn't bisect to figure out when this regressed.

When linking swift, this reduces peak (dirty) memory usage from 25 to 15
gigabytes.

rdar://111525100

[OpenMP][OpenMPIRBuilder] Move copyInput to a passed in lambda function and re-order kernel argument load/stores (#68124)

This patch moves the existing copyInput function
into a lambda argument that can be defined
by a caller to the function.

This allows more flexibility in how the function
is defined, allowing Clang and MLIR to utilise
their own respective functions and types inside
of the lamba without affecting the OMPIRBuilder
itself.

The idea is to eventually replace/build on
the existing copyInput function that's used
and moved into OpenMPToLLVMIRTranslation.cpp
to a slightly more complex implementation
that uses MLIRs map information (primarily
ByRef and ByCapture information at the
moment).

The patch also moves kernel load stores to the top
of the kernel, prior to the first openmp runtime 
invocation. Just makes the IR a little closer to Clang.

Bridge network means that you can get to any port on the VM,
from the host, which is great. However it is quite involved to
setup in some cases, and I've certainly messed it up in the past.

An alternative is forwarding a block of ports and using some
hidden options to lldb-server to limit what it uses. This
commit documents that and the pitfall that the port list isn't shared.

The theory also works for Arm's FVP (which inspired me to write
this up) but since QEMU is the preferred option upstream, it goes
in that document.

Along the way I fixed a link to the QEMU page that used the URL
not a relative link to the document.

Add transformed register to kill flag work list for XVCVDPSP tranformations.

Ref: reviews.llvm.org/D133103

I added instructions for setting the environment variable ROOT_DIR.

There is no log10 instruction in the GLSL Extended Instruction Set so to
implement the HLSL log10 intrinsic when targeting Vulkan this change
adds the logic to derive the result using the following formula:
```
log10(x) = log2(x) * (1 / log2(10))
         = log2(x) * 0.30103
```

This is not yet supported and previously led to a confusing crash where
an extract op with a kDynamic marker, but no dynamic positions was
created. The verifier has also been updated to check for this, and hint
at where the problem is likely to be.

Summary:
There were a few tests that weren't enabled on the GPU. This is because
the logic caused them to be skipped as we don't use CPU featured on the
host. This also disables the logic making multiple versions of the
memory functions.

[mlir][bazel] Fix after https://github.com/llvm/llvm-project/commit/ef8c26b7728c4417ffdaea8b633ceebf0adb292d

/llvm-project/mlir/lib/Dialect/Transform/Transforms/TransformInterpreterPassBase.cpp:167:1: error: unused function 'saveReproToTempFile' [-Werror,-Wunused-function]
saveReproToTempFile(llvm::raw_ostream &os, Operation *target,
^
1 error generated.

[mlir][bazel] Fix after https://github.com/llvm/llvm-project/commit/ef8c26b7728c4417ffdaea8b633ceebf0adb292d

Temporal divergence that was present in input or introduced in IR
transforms, like code-sinking or LICM, is handled in SIFixSGPRCopies
by changing sgpr source instr to vgpr instr.
After 5b657f50, that moved LICM after AMDGPUCodeGenPrepare,
machine-sinking can introduce temporal divergence by sinking
instructions outside of the cycle.
Add isSafeToSink callback in TargetInstrInfo.

Introduced by 5b657f50 that moved
LICM after AMDGPUCodeGenPrepare. Some instructions are no longer
sunk during ir optimizations but in machine-sinking instead.
If vgpr instruction used sgpr defined inside the cycle is sunk outside
of the cycle we end up with not-handled case of temporal divergence.
Add test for theoretical case when SALU instruction (represents
uniform value) is sunk outside of the cycle.
Add a test when SALU instruction can be sunk if it edits lane mask.

This reverts commit 3f8ef57b.

This patch folds the pattern `a ne/eq (zext/sext (a ne/eq c))` into a boolean constant or a compare.
Clang vs GCC: https://godbolt.org/z/4ro817WE8
Proof for `zext`: https://alive2.llvm.org/ce/z/6z9NRF
Proof for `sext`: https://alive2.llvm.org/ce/z/tv5wuE
Fixes #65073.

[mlir][bazel] Fix after https://github.com/llvm/llvm-project/commit/ef8c26b7728c4417ffdaea8b633ceebf0adb292d

These were missed as I didn't expect clang codegen to be updated

[mlir][Transform] Provide a minimal set of utils that allow implementing a simple transform dialect interpreter pass (#68330)

/llvm-project/llvm/include/llvm/CodeGen/BasicTTIImpl.h:948:33: error: comparison of integers of different signs: 'size_t' (aka 'unsigned long') and 'int' [-Werror,-Wsign-compare]
          (Index + Mask.size()) <= NumSrcElts) {
           ~~~~~~~~~~~~~~~~~~~  ^  ~~~~~~~~~~

[mlir][bazel] Fix after https://github.com/llvm/llvm-project/commit/6a2071cc6a129dfe645ef4743fda78e76d748f16

Second try...

[mlir][bazel] Fix after https://github.com/llvm/llvm-project/commit/6a2071cc6a129dfe645ef4743fda78e76d748f16

While working on #68377 inspecting `Allocate()` calls, I found out that
there are couple of places where we forget to use placement-new to
create objects in the allocated memory.

Revert "Revert "Fixes and closes #53952. Setting the ASTHasCompilerErrors member variable correctly based on the PP diagnostics. (#68127)""

This reverts commit a6acf3fd and
relands a50e63b3. The original revert
was done by mistake.

Instead of RDSVL * RDSVL.

This patch tries to canonicalise add + gep to gep + gep.

Co-authored-by: Paul Walker <paul.walker@arm.com>

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D155688

Allow length changing shuffle masks in the "bitcast (shuf V, MaskC) --> shuf (bitcast V), MaskC'" fold.

It also exposes some poor shuffle mask detection for extract/insert subvector cases inside improveShuffleKindFromMask

First stage towards addressing Issue #67803

Made these TODO instead of negative

The transfrom interpreter accepts an argument to a "library" file with
named sequences. This patch exteneds this functionality such that (1)
several such individual files are accepted and (2) folders can be passed
in, in which all `*.mlir` files are loaded.

Fixes misleading comment introduced in
`f74aaca6`

Some large AVR programs (for devices without long jump) may exceed
128KiB, and lld should give explicit errors other than generate wrong
executables silently.

This reverts commit 0687e4d9.
Causes LLDB failures: https://reviews.llvm.org/D101206#4653253

Extend `bufferization.materialize_in_destination` to support memref
destinations. This op can now be used to indicate that a tensor
computation should materialize in a given buffer (that may have been
allocated by another component/runtime). The op still participates in
"empty tensor elimination".

Example:
```mlir
func.func @test(%out: memref<10xf32>) {
  %t = tensor.empty() : tensor<10xf32>
  %c = linalg.generic ... outs(%t: tensor<10xf32>) -> tensor<10xf32>
  bufferization.materialize_in_destination %c in restrict writable %out : (tensor<10xf32>, memref<10xf32>) -> ()
  return
}
```
After "empty tensor elimination", the above IR can bufferize without an
allocation:
```mlir
func.func @test(%out: memref<10xf32>) {
  linalg.generic ... outs(%out: memref<10xf32>)
  return
}
```

This change also clarifies the meaning of the `restrict` unit attribute
on `bufferization.to_tensor` ops.