- Dec 20, 2023
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Nikita Popov authored
Functions using different constant expressions were incorrectly merged, because a lot of state was missing from the comparison, including the opcode, the comparison predicate, the GEP element type, as well as the inbounds, inrange and nowrap poison flags.
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Nico Weber authored
Also set HAVE_DLADDR to 1 on non-Win instead of just on macOS. That looked like an oversight.
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Alexey Bataev authored
If decided to resize the instruction, need to drop wrapping flags from the resulting vector instructions to avoid incorrect optimizations/assumptions later. Fixes PR75995.
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David Spickett authored
The way this code was updated in dd958779 meant that if the first module did not have the symbol, the iteration stopped as returning true means stop. So only if every module had the symbol would we find it, in the last module. Invert the condition to break when we find the first instance, which is what the previous code did.
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Nico Weber authored
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Hassnaa Hamdi authored
Add isel pattern to replase min(max(v1,v2),v3) by clamp Add tests for uclamp, sclamp, bfclamp, fclamp.
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Alexey Bataev authored
minbitwidth types.
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Christian Sigg authored
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bipmis authored
When the sub arguments are ptr2int it is not possible to determine computeKnownBits() of its arguments. For scalar case generally sub of 2 ptr2int are converted to sub of indexes. However a loop with recursive GEP/PHI where the arguments to sub is of type ptr2int, if it is possible to determine that a sub of this GEP and another pointer with the same base is KnownNonZero we can return this. This helps subsequent passes to optimize the loop further.
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Nikita Popov authored
Otherwise inbounds will be inferred, and we don't actually end up testing the case of one gep without inbounds and one with.
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David Spickett authored
This reverts commit 01c4ecb7, d14d5215 and a756dc47. This removes the logging and workaround I added earlier, and puts back the skip for Arm/AArch64 Linux. I've not seen it fail on AArch64 since, but let's not create more noise if it does. I've written up the issue as https://github.com/llvm/llvm-project/issues/76057. It's something to do with trying to destroy a process while a thread is doing a single sep. So my workaround wouldn't have worked in any case. It needs a more involved fix.
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Nikita Popov authored
Looks like we don't even check the opcode :(
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Abhina Sree authored
Use llvm-config.h in CIndexer.cpp instead of private header
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Nikita Popov authored
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Gil Rapaport authored
Add an emitc.expression operation that models C expressions, and provide transforms to form and fold expressions. The translator emits the body of emitc.expression ops as a single C expression. This expression is emitted by default as the RHS of an EmitC SSA value, but if possible, expressions with a single use that is not another expression are instead inlined. Specific expression's inlining can be fine tuned by lowering passes and transforms.
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Matt Arsenault authored
Fix bitcast test, which was splitting apart phis intended to force bitcasts that survive all the way to selection. Disable the amdgpu-codegenprepare phi splitting, which defeats the technique of using a phi to ensure a bitcast reaches all the way to selection. Also add a variety of bfloat tests. These probably need revisiting to avoid the cast folding into argument loads. Also round out set of bfloat bitcast and ABI tests. Add codegen tests for more bf16 operations The promotion of these works contrary to the comment.
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Matt Arsenault authored
Also fix assorted vector extload failures for AMDGPU.
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David Green authored
This makes an adjustment to the existing fir minloc/maxloc generation code to handle functions with a dim=1 that produce a scalar result. This should allow us to get the same benefits as the existing generated minmax reductions.
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Andrzej Warzyński authored
Extends `CreateMaskFolder` pattern so that the following: ```mlir %c8 = arith.constant 8 : index %c16 = arith.constant 16 : index %0 = vector.vscale %1 = arith.muli %0, %c16 : index %10 = vector.create_mask %c8, %1 : vector<8x[16]xi1> ``` is folded as: ```mlir %0 = vector.constant_mask [8, 16] : vector<8x[16]xi1> ```
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David Spickett authored
This has been flaky for a while, for example https://lab.llvm.org/buildbot/#/builders/96/builds/50350 ``` Command Output (stdout): -- lldb version 18.0.0git (https://github.com/llvm/llvm-project.git revision 3974d89b) clang revision 3974d89b llvm revision 3974d89b "can't evaluate expressions when the process is running." ``` ``` PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace. #0 0x0000ffffa46191a0 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x529a1a0) #1 0x0000ffffa4617144 llvm::sys::RunSignalHandlers() (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x5298144) #2 0x0000ffffa46198d0 SignalHandler(int) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x529a8d0) #3 0x0000ffffab25b7dc (linux-vdso.so.1+0x7dc) #4 0x0000ffffab13d050 /build/glibc-Q8DG8B/glibc-2.31/string/../sysdeps/aarch64/multiarch/memcpy_advsimd.S:92:0 #5 0x0000ffffa446f420 lldb_private::process_gdb_remote::GDBRemoteRegisterContext::PrivateSetRegisterValue(unsigned int, llvm::ArrayRef<unsigned char>) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x50f0420) #6 0x0000ffffa446f7b8 lldb_private::process_gdb_remote::GDBRemoteRegisterContext::GetPrimordialRegister(lldb_private::RegisterInfo const*, lldb_private::process_gdb_remote::GDBRemoteCommunicationClient&) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x50f07b8) #7 0x0000ffffa446f308 lldb_private::process_gdb_remote::GDBRemoteRegisterContext::ReadRegisterBytes(lldb_private::RegisterInfo const*) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x50f0308) #8 0x0000ffffa446ec1c lldb_private::process_gdb_remote::GDBRemoteRegisterContext::ReadRegister(lldb_private::RegisterInfo const*, lldb_private::RegisterValue&) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x50efc1c) #9 0x0000ffffa412eaa4 lldb_private::RegisterContext::ReadRegisterAsUnsigned(lldb_private::RegisterInfo const*, unsigned long) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x4dafaa4) #10 0x0000ffffa420861c ReadLinuxProcessAddressMask(std::shared_ptr<lldb_private::Process>, llvm::StringRef) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x4e8961c) #11 0x0000ffffa4208430 ABISysV_arm64::FixCodeAddress(unsigned long) (/home/tcwg-buildbot/worker/lldb-aarch64-ubuntu/build/lib/python3.8/site-packages/lldb/_lldb.cpython-38-aarch64-linux-gnu.so+0x4e89430) ``` Judging by the backtrace something is trying to read the pointer authentication address/code mask registers. This explains why I've not seen this issue locally, as the buildbot runs on Graviton 3 with has the pointer authentication extension. I will try to reproduce, fix and re-enable the test.
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Florian Hahn authored
Generalize checkAndSecondOpImpliedByFirst to also check if the second operand implies the first.
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Sanjay Marreddi authored
std::midpoint is specified by having a pointer overload in [numeric.ops.midpoint]. With the way the pointer overload is specified, users can expect that calling std::midpoint as `std::midpoint<T>(a, b)` should work, but it didn't in libc++ due to the way the pointer overload was specified. Fixes #67046
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Andrzej Warzyński authored
Tests for vector.outerproduct for scalable vectors from "vector-scalable-outerproduct.mlir" are moved to: * ops.mlir and invalid.mlir. These files are effectively used to document what Ops are supported and That's basically what the original file was testing (but specifically for scalable vectors).
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Nikita Popov authored
Needed for switch to lookup table optimization.
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Nikita Popov authored
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Simon Pilgrim authored
Return ConstantPoolSDNode instead of const ConstantPoolSDNode - doesn't affect the accessors at all and makes it easier to use result in calls expecting a SDNode.
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Momchil Velikov authored
According to the latest update of the ISA https://developer.arm.com/documentation/ddi0602/2023-09/?lang=en all of the affected instruction encodings now require (FEAT_SVE2 or FEAT_SME2) and FEAT_SVE_B16B16
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Lucas Duarte Prates authored
For instructions that don't map to a mnemonic string, the implementation of MCInstPrinter::getMnemonic would return an invalid pointer due to the result of the calculation of the instruction's position in the `AsmStrs` table. This patch fixes the issue by ensuring those cases return a `nullptr` value instead. Fixes #74177.
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Nikita Popov authored
Return poison instead of undef for non-demanded lanes in the AMDGPU demanded element simplification hook. Also bail out of dmask is 0, as this case has special semantics: > If DMASK==0, the TA overrides DMASK=1 and puts zeros in VGPR followed by > LWE status if exists. TFE status is not generated since the fetch is dropped.
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Finn Plummer authored
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kadir çetinkaya authored
Header gurads are not detected until we hit EOF. Make sure we postpone any such detection until then.
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David Spickett authored
So we can see it failing and get the extra logged information.
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David Spickett authored
And remove the workaround I was trying, as this logging may prove what the actual issue is. Which I think is that the thread plan map in Process is cleared before the threads are destroyed. So Thread::ShouldStop could be getting the current plan, then the plan map is cleared, then Thread::ShouldStop is deciding based on that plan to pop a plan from the now empty stack.
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Guillaume Chatelet authored
As currently defined `MAX_EXPONENT` actually corresponds to the biased exponent (i.e. an unsigned value).
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jeanPerier authored
Be consistent with complex and character rewrite so that the pass can be run selectively.
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Haojian Wu authored
[AST] RecursiveASTVisitor: traverse the require clause for partial template specializations. (#75795) This fixes tooling (clangd, include-cleaner) bugs where we miss functionalities on concept AST nodes.
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Paschalis Mpeis authored
Cleanup test sleef-calls-aarch64.ll: - make the util update script's regex more clear - eliminate scalar epilogues in tests
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Yvan Roux authored
This patch fixes build attributes w/r to Zcmt extension dependency on Zicsr.
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David Spickett authored
If this works it'll give me a clue for the underlying issue.
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Chenyang Gao authored
This fixes #73109. In instruction `addl %eax %rax`, because there is a missing comma in the middle of two registers, the asm parser will treat it as a binary expression. ``` %rax % rax --> register mod identifier ``` However, In `MCExpr::evaluateAsRelocatableImpl`, it only checks the left side of the expression. This patch ensures the right side will also be checked.
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