Differential Revision: https://reviews.llvm.org/D90199

Skip the instruction stream section in the crashlog section.

Differential revision: https://reviews.llvm.org/D90414

Current user_id_t format is:
        63{isDebugTypes} 62..32{dwo || 7fffffff}
        31..0 {die_offset}
while current DIERef format is (I have made up the bit positions but the
field widths do match):
        63{m_section==isDebugTypes} 62{m_dwo_num_valid} 61..32{m_dwo_num}
        31..0 {m_die_offset}

Proposing to change user_id_t to:
        63{isDebugTypes} 62{dwo_is_valid} 61..32{dwo; 0 if !valid}
        31..0 {die_offset}

There is no benefit of having 31-bits wide dwo_num in user_id_t when it
gets converted to 30-bits width in DIERef.

This patch is for future DWZ patchset which extends the dwo_is_valid bit
into a 2-bit field (normal, DWO, DWZ, DWZcommon) so that both user_id_t
and DIERef can be changed then the same way.

It would be best to somehow unify user_id_t and DIERef but I do not plan
to do that. user_id_t should probably remain a number for the Python API
compatibility while there still needs to be some class with all the
methods to access it.

SymbolFileDWARF::GetDwpSymbolFile() and SymbolFileDWARF::GetDIE use
0x3fffffff for DWP but that does not clash:

formerly:
  31bits32..62:0x7fffffff = normal unit / not any DWO
  31bits32..62:0x3fffffff = DWP
  31bits32..62:others = DWO unit number

after this patch:
  bit62=0 30bits32..61:any = normal unit / not any DWO
  bit62=1 30bits32..61:0x3fffffff = DWP
  bit62=1 30bits32..61:others = DWO unit number

Differential Revision: https://reviews.llvm.org/D90413

Restructure lit tests to follow downstream

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D90468

This is to enable `--allow-unused-duplicates=false`. These prefixes
appear to be outdated and intentionally unused.

Reviewed By: vsk

Differential Revision: https://reviews.llvm.org/D90423

- As convergent intrinsics/calls could only be moved to
  control-equivalent blocks, or more precisely the same divergent
  branch, PRE needs to skip them.

Differential Revision: https://reviews.llvm.org/D90391

Currently isOverwrite returns OW_MaybePartial even for accesss known not to overlap. This is not a big problem for legacy implementation (since isPartialOverwrite follows isOverwrite and clarifies the result). Contrary SSA based version does a lot of work to later find out that accesses don't overlap. Besides negative impact on compile time we quickly reach MemorySSAPartialStoreLimit and miss optimization opportunities.

Note: In fact, I think it would be cleaner implementation if isOverwrite returned fully clarified result in the first place whithout need to call isPartialOverwrite. This can be done as a follow up. What do you think?

Reviewed By: fhahn, asbirlea

Differential Revision: https://reviews.llvm.org/D90371

As suggested on D90445, add tests for various SSE/AVX levels and more complex gep pointer offsets

Fix clang static analyzer warnings - we're better off relying on cast<> asserting on failure rather than a null dereference crash.

Split up the monolithic VETargetLowering ctor into three initialization phases:
1. initRegisterClasses()
2. initSPUActions()
3. // TODO initVPUActions()

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D90463

This patch adds tests and support for operations on SVE vectors created
by the 'arm_sve_vector_bits' attribute, described by the Arm C Language
Extensions (ACLE, version 00bet6, section 3.7.3.3) for SVE [1].

This covers the following:
* VLSTs support the same forms of element-wise initialization as GNU
  vectors.
* VLSTs support the same built-in C and C++ operators as GNU vectors.
* Conditional and binary expressions containing GNU and SVE vectors
  (fixed or sizeless) are invalid since the ambiguity around the result
  type affects the ABI.

No functional changes were required to support vector initialization and
operators. The functional changes are to address unsupported conditional and
binary expressions.

[1] https://developer.arm.com/documentation/100987/latest

Reviewed By: fpetrogalli

Differential Revision: https://reviews.llvm.org/D88233

This reverts commit 316593ce.
Build is broken with:

TestModuleCombiner.cpp:(.text._ZN12_GLOBAL__N_122TestModuleCombinerPass14runOnOperationEv+0x195): undefined reference to `mlir::spirv::combine(llvm::MutableArrayRef<mlir::spirv::ModuleOp>, mlir::OpBuilder&, llvm::function_ref<void (mlir::spirv::ModuleOp, llvm::StringRef, llvm::StringRef)>)'

As per the comment in VPRecipeBase, clients should not rely on
getVPRecipeID, as it may change in the future. It should only be used in
classof implementations. Use isa instead in getFirstNonPhi.

By reducing the scope of the dyn_cast<PointerType> we can make this a cast<PointerType> and avoid clang static analyzer null deference warnings.

Differential Revision: https://reviews.llvm.org/D90449

lit is bundled independently from LLVM in at least one location
(https://pypi.org/project/lit/), it's easier to state its license locally.

Differential Revision: https://reviews.llvm.org/D90136

- Perform the probing in the correct direction.
  Related to https://github.com/rust-lang/rust/pull/77885#issuecomment-711062924

- The first touch on a dynamic alloca cannot use a mov because it clobbers
  existing space. Use a xor 0 instead

Differential Revision: https://reviews.llvm.org/D90216

Fix clang static analyzer warning - we know that the arg should be ConstantInt and we're better off relying on cast<> asserting on failure rather than a null dereference crash.

Fixes cppcheck warning.

[clang] add fexperimental-strict-floating-point to test cases that fail on arm and aarch not sure this will work due to commit rG13bfd89c

SymbolFileDWARF::GetTypes was not handling dwo correctly. The fix is
simple -- adding a GetNonSkeletonUnit call -- but I've snuck in a small
refactor as well.

Revert values in CXCursorKind as they were before
CXCursor_CXXAddrspaceCastExpr was introduced in a6a237f2 ([OpenCL]
Added addrspace_cast operator in C++ mode., 2020-05-18).

Insert CXCursor_CXXAddrspaceCastExpr after the last expression in
CXCursorKind using the next available value.

Reviewed By: akyrtzi, svenvh

Differential Revision: https://reviews.llvm.org/D90385

This is functionally-identical to the previous implementation,
just using a generic interface to do that instead of hand-rolled one,
with caching as a bonus. Thought the sinking is still recursive..

Note that SCEVRewriteVisitor<>'s default implementations
don't preserve NoWrap flags on Add/Mul (but does on AddRec!),
but here we know we can preserve them,
so `visitAddExpr()`/`visitMulExpr()` are specialized.

On some targets, like AArch64, vector selects can be efficiently lowered
if the vector condition is a compare with a supported predicate.

This patch adds a new argument to getCmpSelInstrCost, to indicate the
predicate of the feeding select condition. Note that it is not
sufficient to use the context instruction when querying the cost of a
vector select starting from a scalar one, because the condition of the
vector select could be composed of compares with different predicates.

This change greatly improves modeling the costs of certain
compare/select patterns on AArch64.

I am also planning on putting up patches to make use of the new argument in
SLPVectorizer & LV.

Reviewed By: dmgreen, RKSimon

Differential Revision: https://reviews.llvm.org/D90070

As mentioned in the defect, the lambda static invoker does not follow
the calling convention of the lambda itself, which seems wrong. This
patch ensures that the calling convention of operator() is passed onto
the invoker and conversion-operator type.

This is accomplished by extracting the calling-convention determination
code out into a separate function in order to better reflect the 'thiscall'
work, as well as somewhat better support the future implementation of
https://devblogs.microsoft.com/oldnewthing/20150220-00/?p=44623

For any target (basically just win32) that has a different free and
static function calling convention, this generates BOTH alternatives.
This required some work to get the Windows mangler to work correctly for
this, as well as some tie-breaking for the unary operators.

Differential Revision: https://reviews.llvm.org/D89559

This commit adds a new library that merges/combines a number of spv
modules into a combined one. The library has a single entry point:
combine(...).

To combine a number of MLIR spv modules, we move all the module-level ops
from all the input modules into one big combined module. To that end, the
combination process can proceed in 2 phases:

  (1) resolving conflicts between pairs of ops from different modules
  (2) deduplicate equivalent ops/sub-ops in the merged module. (TODO)

This patch implements only the first phase.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D90022

We don't currently support passing unnamed variadic SVE arguments
so I've added a fatal error if we hit such cases to prevent any
silent ABI issues in future.

Differential Revision: https://reviews.llvm.org/D90230

This adds ISel matching for a form of VQDMULH. There are several ir
patterns that we could match to that instruction, this one is for:

min(ashr(mul(sext(a), sext(b)), 7), 127)

Which is what llvm will optimize to once it has removed the max that
usually makes up the min/max saturate pattern, as in this case the
compare will always be false. The additional complication to match i32
patterns (which extend into an i64) is that the min will be a
vselect/setcc, as vmin is not supported for i64 vectors. Tablegen
patterns have also been updated to attempt to reuse the MVE_TwoOpPattern
patterns.

Differential Revision: https://reviews.llvm.org/D90096

Debug server is already launched by prep_debug_monitor_and_inferior. The
second seems to have been benign so far, but after 8cc49bec this test
started failing frequently on GreenDragon, and this is the only unusual
thing about it.