Functions which correspond but have different template parameter lists
are not redeclarations.

Fixes a regression introduced by af4751

(The patch just moves the template parameters check above if the
signature check)

Fixes #76358

Prior to `e9536698`
(https://reviews.llvm.org/D154764) we only re-ordered the fields of
`RecordDecl`s. The change refactored this logic to make sure
`FieldDecl`s are imported before other member decls. However, this
change also widened the types of `DeclContext`s we consider for
re-ordering from `RecordDecl` to anything that's a `DeclContext`. This
seems to have been just a drive-by cleanup.

Internally we've seen numerous crashes in LLDB where we try to perform
this re-ordering on fields of `ObjCInterfaceDecl`s.

This patch restores old behaviour where we limit the re-ordering to just
`RecordDecl`s.

rdar://119343184
rdar://119636274
rdar://119832131

Need to limit the transformation of the VecMask by the corresponding part of the mask of SliceSize size to avoid compiler crash during further cost analysis.

Reverts llvm/llvm-project#77306

These tests aren't broken on Windows, marking them XFAIL will just ~
consistently fail the build.

The 'if' clause takes a required 'condition' expression.  This patch
implements that as an expression we will later ensure is convertible to
a binary expression.

collectNonISAExtFeature was returning any negative extension features,
e.g.
given an input of

+zifencei,+m,+a,+save-restore,-zbb,-relax,-zfa

It would return

+save-restore,-zbb,-relax,-zfa

Because negative extensions aren't emitted when calling
toFeatureVector(), and
so were considered missing. Hence why we still see "-zfa" and "-zfb" in
the tests for
the full arch string attributes, even though with a full arch string we
should be overriding the extensions.

This fixes it by using RISCVISAInfo::isSupportedExtensionFeature instead
to
check if a feature is an ISA extension.

The bitcast might change the number of vector lanes, in which case
it will be a cross-lane operation.

Fixes https://github.com/llvm/llvm-project/issues/77320.

This moves the functionally of finding a DIE based on a fully qualified
name from SymbolFileDWARF into DWARFIndex itself, so that
specializations of DWARFIndex can implement faster versions of this
query.

[lldb][DWARFASTParserClang] GetClangDeclForDIE: don't create VarDecl for static data members (#77155)

With DWARFv5, C++ static data members are represented as
`DW_TAG_variable`s (see `faa3a5ea`).

In GetClangDeclForDIE, when trying to parse the `DW_AT_specification`
that a static data member's CU-level `DW_TAG_variable` points to, we
would try to `CreateVariableDeclaration`. Whereas previously it was a
no-op (for `DW_TAG_member`s). However, adding `VarDecls` to RecordDecls
for static data members should always be done in
`CreateStaticMemberVariable`. The test-case is an exapmle where we would
crash if we tried to create a `VarDecl` from within `GetClangDeclForDIE`
for a static data member.

This patch simply checks whether the `DW_TAG_variable` being parsed is a
static data member, and if so, trivially returns from
`GetClangDeclForDIE` (as we previously did for `DW_TAG_member`s).

Co-authored-by: Diana Picus <Diana-Magda.Picus@amd.com>

These tests seem to be failing in Windows bots.
See https://github.com/llvm/llvm-project/issues/77086

Setting thread block size with `maxntid` on the kernel has great
performance benefits. In this way, downstream PTX compiler can do better
register allocation.

MLIR's `gpu.launch` and `gpu.launch_func` already has an attribute
(`known_block_size`) that keeps the thread block size when it is known.
This PR simply uses this attribute to set `maxntid`.

This PR contains initial changes for building and testing libomp on AIX.
More changes will follow.
- `KMP_OS_AIX` is defined for the AIX platform
- `KMP_ARCH_PPC` is defined for 32-bit PPC
- `KMP_ARCH_PPC_XCOFF` and `KMP_ARCH_PPC64_XCOFF` are for 32- and 64-bit
XCOFF object formats respectively
- Assembly file `z_AIX_asm.S` is used for AIX specific assembly code and
will be added in a separate PR
- The target library is disabled because AIX does not have the device
support
- OMPT is temporarily disabled

We try to use X32 for gnux32 triples only.

We try to use X32 for gnux32 triples only.

We try to use X32 for gnux32 triples only.

We try to use X32 for gnux32 triples only.

This was added by e42edb55 and
has been failing: https://lab.llvm.org/buildbot/#/builders/219/builds/8012

This was added by 917b404e
and fails for unknown reasons.

This patch eliminates unreachable default cases using range information.
Fixes #76085.

Depends #76217

In line with other RemoveDIs test updates. This test fails without #76941.

This patch is a straightfoward change based on the design in #77202.
It does not have any effect since we haven't supported compressing ND
to non-ND in X86CompressEVEX.cpp.

I'm not sure why we don't get an unused variable warning, but triple
doesn't
seem to be used after 898db113.

warning:
RISCVISelDAGToDAG.cpp:767: warning: suggest parentheses around ‘&&’ within ‘||’ [-Wparentheses]
  767 |          AM == ISD::POST_INC && "Unexpected addressing mode");

after 20a05677

If the overload fails, the `Best` might point to the `end()`,
referencing it leads to asan crashes.

This is the first of the 7 steps outlined in #75801. This PR explicitely
calls the SimplifyLoops pass. Directly following this pass should follow
the 6 others required to structurize the IR.

Running this pass could generate empty basic-blocks, which are implicit
fallthrough to the successor BB.
There was a specific condition in the SPIR-V ISel which handled implicit
fallthrough, but it couldn't work on empty basic-blocks. This commits
removes the old logic, and adds this new logic, which checks all
basic-blocks for implicit fallthroughs, including empty ones.

---------

Signed-off-by: Nathan Gauër <brioche@google.com>

Florian pointed out that we're accidentally eliding the Android note for
static executables, as it's guarded behind the "can have memtag globals"
conditional. Of course, memtag globals are unsupported for static
executables, but we should still allow static binaries to produce the
Android note (as that's the only way they get MTE).

This restores a subset of functionality that was forego in
d68826df.

Streaming multiple string literals is rare enough in practice, hence
that change makes sense in general. But it seems people were
incidentally relying on this for having line breaks after string
literals that ended with `\n`.

This patch tries to restore that behavior to prevent regressions in the
upcoming LLVM release, until we can implement some configuration based
approach as proposed in https://github.com/llvm/llvm-project/pull/69859.

NFC. clean up.

Fixes https://github.com/llvm/llvm-project/pull/74439#issuecomment-1880528376

Sometimes, we create a MemoryAccess for an instruction, which is later
simplified (e.g. via devirtualization) such that the new instruction has
no memory effects anymore.

If we later clone the instruction (e.g. during unswitching), then MSSA
will not create a MemoryAccess for the new instruction, triggering an
assert.

Disable the assertion (by passing CreationMustSucceed=false) and adjust
getDefiningAccessForClone() to work correctly in that case.

This PR implements the alternative suggestion by alinas from
https://github.com/llvm/llvm-project/pull/76142.

When adding information for induction variables, add both unsigned and
signed constraints, with corresponding signed and unsigned
preconditions.

I believe the logic here is equally valid for signed/unsigned, we just
need to add preconditions of the same type.

And add a check in the python script that the binary given to `--qemu`
actually exists. Otherwise you get a generic Python error:
```
 # .---command stderr------------
 # | Traceback (most recent call last):
 # |   File "/home/david.spickett/modules-llvm-project/libcxx/utils/qemu_baremetal.py", line 70, in <module>
 # |     exit(main())
 # |   File "/home/david.spickett/modules-llvm-project/libcxx/utils/qemu_baremetal.py", line 66, in main
 # |     os.execvp(qemu_commandline[0], qemu_commandline)
 # |   File "/usr/lib/python3.8/os.py", line 568, in execvp
 # |     _execvpe(file, args)
 # |   File "/usr/lib/python3.8/os.py", line 610, in _execvpe
 # |     raise last_exc
 # |   File "/usr/lib/python3.8/os.py", line 601, in _execvpe
 # |     exec_func(fullname, *argrest)
 # | FileNotFoundError: [Errno 2] No such file or directory
 # `-----------------------------
 # error: command failed with exit status: 1
```
When it tries to run the entire command later.

For the builder, it's only ever going to use qemu-system-arm so error at
config time if it's not there.

Updated SLEEF and ArmPL tests with Fixed-Width and Scalable cases for
frem. Those are mapped to fmod/fmodf.

Compress promoted instruction (EVEX) to pre-promotion instruction
(legacy/VEX) when R16-R31 is not used.

Alternative of #77065