- Nov 27, 2019
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Vitaly Buka authored
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Vitaly Buka authored
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Fangrui Song authored
It is tricky to use replace_path_prefix correctly on Windows which uses backslashes as native path separators. Switch back to the old approach (startswith is not ideal) to appease build bots for now.
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Craig Topper authored
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Fangrui Song authored
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Dan McGregor authored
GCC 8 implements -fmacro-prefix-map. Like -fdebug-prefix-map, it replaces a string prefix for the __FILE__ macro. -ffile-prefix-map is the union of -fdebug-prefix-map and -fmacro-prefix-map Reviewed By: rnk, Lekensteyn, maskray Differential Revision: https://reviews.llvm.org/D49466
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Sanjay Patel authored
This is correct for any value including NaN/inf. We don't have this fold directly in the backend either, but x86 manages to get it after converting things to bitops.
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Sanjay Patel authored
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Sanjay Patel authored
InstCombine doesn't have any transforms for copysign currently.
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Simon Atanasyan authored
There are a couple of bugs with the sc, scs, ll, lld instructions expanding: 1. On R6 these instruction pack immediate offset into a 9-bit field. Now if an immediate exceeds 9-bits assembler does not perform expansion and just rejects such instruction. 2. On 64-bit non-PIC code if an operand is a symbol assembler generates incorrect sequence of instructions. It uses R_MIPS_HI16 and R_MIPS_LO16 relocations and skips R_MIPS_HIGHEST and R_MIPS_HIGHER ones. To solve these problems this patch: - Introduces `mem_simm9_exp` to mark 9-bit memory immediate operands which require expansion. Probably later all `mem_simm9` operands will be able to migrate on `mem_simm9_exp` and we rename it to `mem_simm9`. - Adds new `OPERAND_MEM_SIMM9` operand type and assigns it to the `mem_simm9_exp`. That allows to know operand size in the `processInstruction` method and decide whether we need to expand instruction. - Adds `expandMem9Inst` method to expand instructions with 9-bit memory immediate operand. This method just load immediate into a "base" register used by origibal instruction: sc $2, 256($sp) => addiu $1, $sp, 256 sc $2, 0($1) - Fix `expandMem16Inst` to support a correct set of relocations for symbol loading in case of 64-bit non-PIC code. ll $12, symbol => lui $12, 0 R_MIPS_HIGHEST symbol daddiu $12, $12, 0 R_MIPS_HIGHER symbol dsll $12, $12, 16 daddiu $12, $12, 0 R_MIPS_HI16 symbol dsll $12, $12, 16 ll $12, 0($12) R_MIPS_LO16 symbol - Fix `expandMem16Inst` to unify handling of 3 and 4 operands instructions. - Delete unused now `MipsTargetStreamer::emitSCWithSymOffset` method. Task for next patches - implement expanding for other instructions use `mem_simm9` operand and other `mem_simm##` operands. Differential Revision: https://reviews.llvm.org/D70648 -
Craig Topper authored
[LegalizeTypes] Add SoftenFloatRes_Unary and SoftenFloatRes_Binary functions to factor repeated patterns out of many of the SoftenFloatRes_* functions This has been factored out of D70654 which will add strict FP support to these functions. By making the helpers we avoid repeating even more code. Differential Revision: https://reviews.llvm.org/D70736
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David Tenty authored
Summary: The Python ctypes FFI interface is broken on AIX, it cannot properly pass structures containing arrays ( https://bugs.python.org/issue38628). So disable the clang python binding tests on AIX till this is resolved. Reviewers: stevewan, jasonliu, hubert.reinterpretcast, mgorny Reviewed By: jasonliu, hubert.reinterpretcast Subscribers: mgorny, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D70675
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Craig Topper authored
[LegalizeDAG] Use getOperationAction instead of getStrictFPOperationAction for STRICT_LRINT/LROUND/LLRINT/LLROUND.
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Fangrui Song authored
The latter has better codegen in non-optimized builds, which do not run ipsccp.
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Craig Topper authored
This is the following patch of D68854. This patch adds basic operations of X87 instructions, including +, -, *, / , fp extensions and fp truncations. Patch by Chen Liu(LiuChen3) Differential Revision: https://reviews.llvm.org/D68857
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Craig Topper authored
Patch by Chen Liu(LiuChen3) Differential Revision: https://reviews.llvm.org/D70706
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Fangrui Song authored
Reviewed By: luismarques Differential Revision: https://reviews.llvm.org/D70578
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Fangrui Song authored
Reviewed By: grimar, peter.smith Differential Revision: https://reviews.llvm.org/D70506
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Fangrui Song authored
D62381 introduced forEachSymbol(). It seems that many call sites cannot be parallelized because the body shared some states. Replace forEachSymbol with iterator_range<filter_iterator<...>> symbols() to simplify code and improve debuggability (std::function calls take some frames). It also allows us to use early return to simplify code added in D69650. Reviewed By: grimar Differential Revision: https://reviews.llvm.org/D70505
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Alexey Bataev authored
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Alexey Bataev authored
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David Green authored
Some of these patterns have grown quite organically. I've tried to organise them a little here, moving all the PatFlags together and giving them a more consistent naming scheme, to allow some of the later patterns to be merged into a single multiclass. Differential Revision: https://reviews.llvm.org/D70178
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David Green authored
MVE has a basic symmetry between it's normal loads/store operations and the masked variants. This means that masked loads and stores can use pre-inc and post-inc addressing modes, just like the standard loads and stores already do. To enable that, this patch adds all the relevant infrastructure for treating masked loads/stores addressing modes in the same way as normal loads/stores. This involves: - Adding an AddressingMode to MaskedLoadStoreSDNode, along with an extra Offset operand that is added after the PtrBase. - Extending the IndexedModeActions from 8bits to 16bits to store the legality of masked operations as well as normal ones. This array is fairly small, so doubling the size still won't make it very large. Offset masked loads can then be controlled with setIndexedMaskedLoadAction, similar to standard loads. - The same methods that combine to indexed loads, such as CombineToPostIndexedLoadStore, are adjusted to handle masked loads in the same way. - The ARM backend is then adjusted to make use of these indexed masked loads/stores. - The X86 backend is adjusted to hopefully be no functional changes. Differential Revision: https://reviews.llvm.org/D70176
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David Green authored
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stozer authored
DIExpressions with shift operators should not be fragmented for the same reason as arithmetic operators: carry over cannot be expressed from one fragment to the other, so an invalid result would be produced. Differential Revision: https://reviews.llvm.org/D70601
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jasonliu authored
This is a follow up commit to address post-commit comment in D70443 Differential revision: https://reviews.llvm.org/D70443
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- Nov 26, 2019
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vpykhtin authored
Differential revision: https://reviews.llvm.org/D70405
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Alexey Bataev authored
Need to perform the instantiation of the combiner/initializer even if the resulting type is not dependent, if the construct is defined in templates in some cases.
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Michał Górny authored
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Alexander Kornienko authored
Actually, just testing GitHub commit rights.
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Luís Marques authored
Summary: Adds support for softening FCOPYSIGN operands. Adds RISC-V tests that exercise the new softening code. Reviewers: asb, lenary, efriedma Reviewed By: efriedma Tags: #llvm Differential Revision: https://reviews.llvm.org/D70679
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Luís Marques authored
Summary: Adds tablegen patterns to explicitly handle fcopysign where the magnitude and sign arguments have different types, due to the sign value casts being removed the by DAGCombiner. Support for RV32IF follows in a separate commit. Adds tests for all relevant scenarios except RV32IF. Reviewers: lenary Reviewed By: lenary Tags: #llvm Differential Revision: https://reviews.llvm.org/D70678
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Georgii Rymar authored
Currently we have following issues: 1) We have 2 different implementations with a different behaviors for GNU/LLVM styles. 2) Errors are either not handled at all or we call report_fatal_error with not helpfull messages. 3) There is no test coverage even for those errors that are reported. This patch reimplements parsing of the SHT_GNU_verdef section entries in a single place, adds a few error messages and test coverage. Differential revision: https://reviews.llvm.org/D70495
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Pavel Labath authored
This quashes a -Wformat-truncation warning.
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Sanjay Patel authored
Pulling a couple of extra tests out of D64258 before abandoning in favor of D70714
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Raphael Isemann authored
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Pavel Labath authored
Crushing a "sprintf" buffer is null warning.
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Georgii Rymar authored
It removes 2 precompiled binaries used which are now can be crafted with the use of yaml2obj. Differential revision: https://reviews.llvm.org/D70711
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Pavel Labath authored
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Pavel Labath authored
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