prepareSymbolRelocation() in Writer.cpp adds both symbols that need binding and
symbols relocated with a pointer relocation to the got.

Pointer relocations are emitted for non-movq GOTPCREL(%rip) loads.  (movqs
become GOT_LOADs so that the linker knows they can be relaxed to leaqs, while
others, such as addq, become just GOT -- a pointer relocation -- since they
can't be relaxed in that way).

For example, this C file produces a private_extern GOT relocation when
compiled with -O2 with clang:

    extern const char kString[];
    const char* g(int a) { return kString + a; }

Linkers need to put pointer-relocated symbols into the GOT, but ld64 marks them
as LOCAL in the indirect symbol table. This matters, since `strip -x` looks at
the indirect symbol table when deciding what to strip.

The indirect symtab emitting code was assuming that only symbols that need
binding are in the GOT, but pointer relocations where there too. Hence, the
code needs to explicitly check if a symbol is a private extern.

Fixes https://crbug.com/1242638, which has some more information in comments 14
and 15. With this patch, the output of `nm -U` on Chromium Framework after
stripping now contains just two symbols when using lld, just like with ld64.

Differential Revision: https://reviews.llvm.org/D111852

- When a redundant MBB is being erased from MDT, check whether its
  single successor is dominiated by it. If yes, update that successor's
  idom before erasing MBB; otherwise, it implies MBB is a leaf node and
  could be erased directly.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D111831

It's not obvious why they are needed, and tests pass.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D111859

This clears the memory used for the Clang AST before we run LLVM passes.

https://llvm-compile-time-tracker.com/compare.php?from=d0a5f61c4f6fccec87fd5207e3fcd9502dd59854&to=b7437fee79e04464dd968e1a29185495f3590481&stat=max-rss
shows significant memory savings with no slowdown (in fact -O0 slightly speeds up).

For more background, see
https://lists.llvm.org/pipermail/cfe-dev/2021-September/068930.html.

Turn this off for the interpreter since it does codegen multiple times.

Differential Revision: https://reviews.llvm.org/D111270

This is needed during isel pseudo expansion in order not to crash on huge
immediates.

Review: Ulrich Weigand

These were put in lib/Target instead of tests.

Thankfully dupes of them already existed in the tests directory.

So, just delete them.

This test starts failing when people add a setting starting with
`target.process.t` which of course can easily happen. Make it a bit more
resistant by only requiring that `target.process.thr` has a unique completion.

After D80369, the retainedTypes in CU's should not have any subprograms
so we should not handle that case when emitting debug info.

Differential Revision: https://reviews.llvm.org/D111593

Fixes: https://bugs.llvm.org/show_bug.cgi?id=51841

This patch places an arbitrary limit on the size of DIExpressions that
we will produce via salvaging, for performance reasons. This helps to
fix a performance issue observed in the bug above, in which debug values
would be salvaged hundreds of times, producing expressions with over
1000 elements and causing the compiler to hang. Limiting the size of
debug values that we will produce to 128 largely fixes this issue.

Reviewed By: dblaikie, jmorse

Differential Revision: https://reviews.llvm.org/D110332

Next step towards supporting sparse tensors outputs.
Also some minor refactoring of enum constants as well
as replacing tensor arguments with proper buffer arguments
(latter is required for more general sizes arguments for
the sparse_tensor.init operation, as well as more general
spares_tensor.convert operations later)

Reviewed By: wrengr

Differential Revision: https://reviews.llvm.org/D111771

This patch remove the override in AIX target,
so the int128 is enabled in 64 bit mode or with ForceEnableInt128.

Reviewed By: lkail

Differential Revision: https://reviews.llvm.org/D111078

When building frameworks, headermaps responsible for mapping angle-included headers to their source file location are passed via
`-I` and not `-index-header-map`. Also, `-index-header-map` is only used for indexing purposes and not during most builds.
This patch holds on to the framework's name in HeaderFileInfo as this is retrieveable for cases outside of IndexHeaderMaps and
still represents the framework that is being built.

resolves: rdar://84046893

Reviewed By: jansvoboda11

Differential Revision: https://reviews.llvm.org/D111468

The attributes string doesn't include 'f' or 'h'. I don't think
any code looks at the header name without those.

Reviewed By: simon_tatham

Differential Revision: https://reviews.llvm.org/D111755

Differential Revision: https://reviews.llvm.org/D111893

This PR only updates the synopsis in `<charconv>` -- the current
implementation already [deletes](https://github.com/llvm/llvm-project/blob/e9e6266c704df43e2c52308e1b653dccefa89e04/libcxx/include/charconv#L108)
the overload and has a [test](https://github.com/llvm/llvm-project/blob/main/libcxx/test/std/utilities/charconv/charconv.to.chars/integral.bool.fail.cpp)
for it (and this has been the case from the first [commit](https://reviews.llvm.org/D41458)
where `<charconv>` was added).

Reviewed By: #libc, Mordante

Differential Revision: https://reviews.llvm.org/D111845

The execution order of the tasks is not fixed, so there is no ordering
for the write accesses. Enforce the ordering that is expected in the check.

During the review of D111166 I had a private discussion with @ldionne to
avoid the duplication of the C++2b issues in the Ranges and Format
status pages. The main reason for duplicating them is to make it easier to
find them. The title of the paper may not always make it clear to which
project the paper belongs.

This commit removes all LWG-issues from the Ranges and Format status page
and adds labels for these issue in the C++20/C++23 issues list.

A quick scan revealed there are some issues that are missing a label since
they weren't on the ranges issue list. These can be labelled in a separate
commit. In that commit I'll also look for issues for the spaceship operator
and chrono.

Reviewed By: Quuxplusone, ldionne, #libc

Differential Revision: https://reviews.llvm.org/D111458

Currently -W and --wide are treated as two options as they are only
included for gnu readelf compatibility and ignored. This change makes -W
an alias of --wide to be consistent with other option aliases.

Differential Revision: https://reviews.llvm.org/D111731

Differential Revision: https://reviews.llvm.org/D111805

The isU24() and isI24() calls numBits to make its decision. This change
replaces them with the internal numBits call so that we can use its
result for the > 32 bit width cases.

Differential Revision: https://reviews.llvm.org/D111864

Polly is trying to move towards using isl::ast_expr / isl-noexceptions.h
(which implements RAII) where possible instead of manually managing memory.
checkIslAstExprInt manually frees Expr, so it has been removed to be
more idiomatic and consistent.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D111769

We were missing a null pointer check that a template parameter existed
at all.

This will help make sense of the double use of the same type in https://reviews.llvm.org/D111622#inline-1065560.

Differential Revision: https://reviews.llvm.org/D111868

Solves https://bugs.llvm.org/show_bug.cgi?id=52056

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111507

This patch enables support for Cortex-A510 CPUs.

Reviewed By: MarkMurrayARM, dmgreen

Differential Revision: https://reviews.llvm.org/D109825

This changes fixes a case in which the highest set bit of the original
result is at bit 31 and sign-extending the mul24 for it would make the
result negative.

Differential Revision: https://reviews.llvm.org/D111823

[pstl] Initial implementation of OpenMP backend, on behalf of Christopher Nelson nadiasvertex@gmail.com

Phabricator Review:
https://reviews.llvm.org/D99836

A couple of parallel patterns still remains serial - "Parallel partial sort", and "Parallel transform scan" - there are //TODOs in the code.

Fix a bug introduced while refactoring ABIAArch64::AugmentRegisterInfo()
that caused subregisters to be added even if they were already present.
Instead, abort immediately if at least one subregister is found
(following ABIX86).  While at it, add a test for that.

Differential Revision: https://reviews.llvm.org/D111881

headers from the latter.

Differential Revision: https://reviews.llvm.org/D111876

This was committed as ec6c8471, but then reverted after a failure
in: https://lab.llvm.org/buildbot/#/builders/84/builds/13983

I was not able to reproduce the problem, but I added an extra check
for a NULL QualType just in case.

Original comit message:

The patch adds missing diagnostics for cases like:

  float F3 = ((__float128)F1 * (__float128)F2) / 2.0f;

Sema::checkDeviceDecl (renamed to checkTypeSupport) is changed to work
with a type without the corresponding ValueDecl. It is also refactored
so that host diagnostics for unsupported types can be added here as
well.

Differential Revision: https://reviews.llvm.org/D109315

Differential Revision: https://reviews.llvm.org/D108831

Support specifying an offset for value_regs[0], and add the offset
to the computed derived register offset.  This makes it possible to
e.g. create the "ah" register on x86.

Differential Revision: https://reviews.llvm.org/D111489