Use a dedicated cmake file to store the extension configured within LLVM. That
way, a standalone build of clang can load this cmake file and get all the
configured standalone extensions.

This patch is related to https://reviews.llvm.org/D74602

Differential Revision: https://reviews.llvm.org/D74757

(cherry picked from commit 3a0f6e69)

As suggested in https://github.com/llvm/llvm-project/issues/120, don't try to
generate the extension file from clang, only do the linking step.

Fixes the regression introduced in D74464 when running cmake inside the clang
directory.

Differential Revision: https://reviews.llvm.org/D74602

(cherry picked from commit 87dac7da)

Call llvm_process_pass_plugin from clang when in standalone mode.

Differential Revision: https://reviews.llvm.org/D74464

(cherry picked from commit d21664cc)

The alignment of ARM64 range extension thunks was fixed in
7c816492, but ARM range extension thunks, and import
and delay import thunks also need aligning (like all code on ARM
platforms).

I'm adding a test for alignment of ARM64 import thunks - not
specifically adding tests for misalignment of all of them though.

Differential Revision: https://reviews.llvm.org/D77796

(cherry picked from commit 12c9e2f1)

This is the first checkin to support Marvell ThunderX3T110.

Initial definition of the micro-ops of the instructions in ThunderX3T110
is included.

Differential Revision: https://reviews.llvm.org/D78129

(cherry picked from commit 382d3a85)

[X86] make sure POP has implicit def/use of stack pointer when materializing 8-bit immediates for minsize

Summary:
Otherwise PostRA list scheduler may reorder instruction, such as

schedule this
'''
pushq  $0x8
pop    %rbx
lea    0x2a0(%rsp),%r15
'''
to
'''
pushq  $0x8
lea    0x2a0(%rsp),%r15
pop    %rbx
'''
by mistake. The patch is to prevent this to happen by making sure POP has
implicit use of SP.

Reviewers: craig.topper

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77031

(cherry picked from commit ece79f47)

Fixes PR46184
Report line 1 of the last memory buffer.

(cherry picked from commit ac6abc99)

Summary:
Currently, `rewriteLoopExitValues()`'s logic is roughly as following:
> Loop over each incoming value in each PHI node.
> Query whether the SCEV for that incoming value is high-cost.
> Expand the SCEV.
> Perform sanity check (`isValidRewrite()`, D51582)
> Record the info
> Afterwards, see if we can drop the loop given replacements.
> Maybe perform replacements.

The problem is that we interleave SCEV cost checking and expansion.
This is A Problem, because `isHighCostExpansion()` takes special care
to not bill for the expansions that were already expanded, and we can reuse.

While it makes sense in general - if we know that we will expand some SCEV,
all the other SCEV's costs should account for that, which might cause
some of them to become non-high-cost too, and cause chain reaction.

But that isn't what we are doing here. We expand *all* SCEV's, unconditionally.
So every next SCEV's cost will be affected by the already-performed ...

Summary:
SCTLR_EL1.BT[01] controls the PACI[AB]SP compatibility with PBYTE 11
(see [1])
This bit will be set to zero so PACI[AB]SP are equal to BTI C
instruction only.

[1] https://developer.arm.com/docs/ddi0595/b/aarch64-system-registers/sctlr_el1

Reviewers: chill, tamas.petz, pbarrio, ostannard

Reviewed By: tamas.petz, ostannard

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81746

(cherry picked from commit b8ae3fdf)

In some cases BTI landing pad is inserted even compatible instruction
was there already. Meta instruction does not count in this case
therefore skip them in the check for first instructions in the function.

Differential revision: https://reviews.llvm.org/D74492

(cherry picked from commit d5a186a6)

This fixes PR# 45336.
Output sections described in a linker script as NOLOAD with no input sections would be marked as SHT_PROGBITS.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D76981

(cherry picked from commit fdc41aa2)

(cherry picked from commit 09ac859c)

Similar to D81212.

Differential Revision: https://reviews.llvm.org/D81292

(cherry picked from commit 3408dcbd)

Shifts are supposed to always shift in zeros or sign bits regardless of their inputs. It's possible the input value may have been replaced with undef by SimplifyDemandedBits, but the shift in zeros are still demanded.

This issue was reported to me by ispc from 10.0. Unfortunately their failing test does not fail on trunk. Seems to be because the shl is optimized out earlier now and doesn't become VSHLI.

ispc bug https://github.com/ispc/ispc/issues/1771

Differential Revision: https://reviews.llvm.org/D81212

(cherry picked from commit 7c9a89fe)

The intention here seems to be to end the generator function, but with
modern Python, raising StopIteration causes a runtime error
(https://www.python.org/dev/peps/pep-0479/).

Differential revision: https://reviews.llvm.org/D79169

(cherry picked from commit 88aad9b9)

(cherry picked from commit ca1c21d4)

(cherry picked from commit a940a246)

Bug report: https://bugs.llvm.org/show_bug.cgi?id=45291

Patch by Tomasz Miąsko

Differential Revision: https://reviews.llvm.org/D80066

(cherry picked from commit 5f65faef)

This patch adds the x, t and g modifiers for inline asm from GCC. These will print a vector register as xmm*, ymm* or zmm* respectively.

I also fixed register names with modifiers with inteldialect so they are no longer printed with a leading %.

Patch by Amanieu d'Antras

Differential Revision: https://reviews.llvm.org/D78977

(cherry picked from commit c5f7c039)

Solves this issue: https://github.com/clangd/clangd/issues/157

This is my first contribution to an llvm project, so I hope I'm doing it right!

Patch by @topisani (Tobias Pisani)!

Reviewers: kadircet, klimek

Differential Revision: https://reviews.llvm.org/D73811

(cherry picked from commit 6e8d6bc9)

Summary: Fixes https://github.com/clangd/clangd/issues/347.

Reviewers: kadircet

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78626

(cherry picked from commit 7d1ee639)
Includes some test-only changes from f651c402
to support the cherry-picked tests.
Test tweaked slightly as it exhibits a separate bug that was fixed on master.

Summary:
Our previous definition of "top-level" was too informal, and didn't
allow for overlapping macros that each directly produce expanded tokens.
See D77507 for previous discussion.

Fixes http://bugs.llvm.org/show_bug.cgi?id=45428

Reviewers: kadircet, vabridgers

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77615

(cherry picked from commit d66afd6d)

Summary:
The motivation here is fixing https://bugs.llvm.org/show_bug.cgi?id=45428, see
D77507. The fundamental problem is that a "top-level" expansion wasn't precisely
defined. Repairing this concept means that TokenBuffer's "top-level expansion"
may not correspond to a single macro expansion. Example:

```
M(2); // expands to 1+2
```

The expansions overlap, but neither expansion alone yields all the tokens.
We need a TokenBuffer::Mapping that corresponds to their union.

This is fairly easy to fix in CollectPPExpansions, but the current design of
TokenCollector::Builder needs a fix too as it relies on the macro's expansion
range rather than the captured expansion bounds. This fix is hard to make due
to the way code is reused within Builder. And honestly, I found that code pretty
hard to reason about too.

The new approach doesn't use the expansion range, but only the expansion
location: it assumes an expansion is the contiguous set of expanded tokens with
the same expansion location, which seems like a reasonable formalization of
the "top-level" notion.

And hopefully the control flow is easier to follow too, it's considerably
shorter even with more documentation.

Reviewers: kadircet

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77614

(cherry picked from commit ec0b9908)

Summary: By default it's 512K, which is way to small for clang parser to run on. There is no way to do it via platform-independent API, so it's implemented via pthreads directly in clangd/Threading.cpp.

Fixes https://github.com/clangd/clangd/issues/273

Patch by Dmitry Kozhevnikov!

Reviewers: ilya-biryukov, sammccall, arphaman

Reviewed By: ilya-biryukov, sammccall, arphaman

Subscribers: dexonsmith, umanwizard, jfb, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D50993

(cherry picked from commit 69a39dc1)

Summary:
Constructors can have implicit initializers, this was crashing define
outline. Make sure we find the first "written" ctor initializer to figure out
`:` location.

Fixes https://github.com/clangd/clangd/issues/400

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D80521

(cherry picked from commit eeedbd03)

Fixes https://github.com/clangd/clangd/issues/418

Summary:
PCH format is unstable, hence using a preamble built with a different
version of clang (or even worse, a different compiler) might result in
unexpected behaviour.

PCH creation on the other hand is something clangd wouldn't want to perform, as
it doesn't generate any output files.

This patch makes sure clangd drops any PCH related compile commands after
parsing the command line args.

Fixes https://github.com/clangd/clangd/issues/248

Reviewers: sammccall

Subscribers: mgorny, ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79669

(cherry picked from commit 35d867a7)

Dropped the test as it depends on nontrivial changes from master.
The code is very simple and identical to that tested on master.

Fixes https://github.com/clangd/clangd/issues/419

Summary:
Selection tree was performing an early claim only for VarDecls, but
there are other cases where we can have declarators, e.g. FieldDecls. This patch
extends the early claim logic to all types of declarators.

Fixes https://github.com/clangd/clangd/issues/292

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D75106

(cherry picked from commit e6b81818)

Modified the cherry-picked test as diagnostics differ on the branch.

Fixes https://github.com/clangd/clangd/issues/421

Summary: Fixes https://github.com/clangd/clangd/issues/322

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78833

(cherry picked from commit 294b9d43)

Fixes https://github.com/clangd/clangd/issues/422

Summary:
Default args might exist but be unparsed or uninstantiated.
getDefaultArg asserts on those. This patch makes sure we don't crash in such
scenarios.

Reviewers: sammccall, ilya-biryukov

Subscribers: MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73723

(cherry-picked from commit 9c903d03)

Fixes https://github.com/clangd/clangd/issues/424

Summary: Fix https://github.com/clangd/clangd/issues/293

Reviewers: sammccall

Subscribers: ilya-biryukov, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D76320

(cherry picked from commit bd763e2c)

with an invalid scope specifier.

(cherry picked from commit 44c3a63c)

Summary: Fixes https://github.com/clangd/clangd/issues/309

Subscribers: ilya-biryukov, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77194

(cherry picked from commit 8b3b7556)

Summary:
This is a fairly ugly hack - we back off several features for any variable
whose type isn't deduced, to avoid computing/caching linkage.
Better suggestions welcome.

Fixes https://github.com/clangd/clangd/issues/274

Reviewers: kadircet, kbobyrev

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73960

(cherry picked from commit 2629035a)

Summary:
this maybe not ideal, but it is trivial and does fix the crash.

Fixes https://github.com/clangd/clangd/issues/156.

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D78715

(cherry picked from commit a466e4be)

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D74025

(cherry picked from commit eaf0c89e)

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D73102

(cherry picked from commit 5d4e8997)

I've hit this stack trace a few times but don't have a good reproducer.
The code is unsafe by inspection, though.

(cherry picked from commit 9a5c448a)

Summary: Likely fixes https://bugs.llvm.org/show_bug.cgi?id=45858.

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80047

(cherry picked from commit fc937806)

Summary:
In 2e24219d, a number of ARM pcrel fixups were resolved at assembly
time, to solve PR44929. This only covered little-endian ARM however, so
add similar fixups for big-endian ARM. Also extend the test case to
cover big-endian ARM.

Reviewers: hans, psmith, MaskRay

Reviewed By: psmith, MaskRay

Subscribers: kristof.beyls, hiraditya, danielkiss, emaste, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79774

(cherry picked from commit fc373522)

When compiling for a arm5te cpu from clang, the +dsp attribute is set.
This meant we could try and generate qadd8 instructions where we would
end up having no pattern. I've changed the condition here to be hasV6Ops
&& hasDSP, which is what other parts of ARMISelLowering seem to use for
similar instructions.

Fixed PR45677.

Differential Revision: https://reviews.llvm.org/D78877

(cherry picked from commit 88071390)