Projected bitwidth should be less than the original, not greater.

Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226 (#81394)

Resolve #78226

Move 3 interface headers in `//mlir:IR` from `hdrs` to `srcs`.

Header files should not be added to multiple targets, but this is hard
to avoid because CMake is less strict with headers. But we should at
least avoid exposing them as headers by multiple targets because it
confuses tooling.

[SelectionDAG] Add MaskedValueIsZero check to allow folding of zero extended variables we know are safe to extend (#85573)

Add ones for every high bit that will cleared.

This will allow us to evaluate variables that have their bits known to
see if they have no risk of overflow despite the shift amount being
greater than the difference between the two types.

Implements:
- LWG3869 Deprecate std::errc constants related to UNIX STREAMS

When building the OpenMP runtime with libomptarget support, the runtimes
configure step needs to have a dependency on various tools, in
particular opt, so that cmake configure checks yield the correct
results.

This did not work correctly, as the dependencies were only added if the
OPENMP_ENABLE_LIBOMPTARGET was set - but that variable is only set by
the openmp/CMakeLists.txt file, which isn't even parsed during the
initial cmake run (in fact, it is only parsed when executing the
runtimes configure step itself, but then it is too late).

Fixed by just adding those dependencies always.

In addition, the list of dependencies collected in ${extra_deps},
including those required for OpenMP, was only actually used when
configuring runtimes for the default set of targets - when the user
specifies a non-default LLVM_RUNTIME_TARGETS, those extra dependencies
were ignored (with the exception of ${hdrgen_deps}).

Fixed by passing the full ${extra_deps} in this case as well.

Fixes: https://github.com/llvm/llvm-project/issues/85933

Commit a7d5f73a introduced an
error in a target_compile_definitions on the SystemZ, causing
the build to break.  Fixed by adding the missing "PRIVATE".

`copy_n` has been used to allow constant evaluation of `char_traits`. We
now have `__constexpr_memmove`, which `copy_n` just forwards to. We can
call `__constexpr_memmove` directly, avoiding a bunch of instantiations.
This reduces the time it takes to include `<string>` from 321ms to
285ms.

Reland of #75333 

And use it in EC lowering code. It will be useful for LLD too.

This is compatible with MSVC, `-machine:arm64x` is essentially an alias
to `-machine:arm64ec`. To make a type library that exposes both native
and EC symbols, an additional `-defArm64Native` argument is needed in
both cases.

Refactor the logic that checks if a module contains mixed
absolute/non-lowered LDS GVs.

The check now happens latter when the "worklists" are formed. This is
because in some cases (OpenMP) we can have non-lowered GVs in a lowered
module, and this is normal because those GVs are just unused and removed
from the list at some point before the end of `getUsesOfLDSByFunction`.

Doing the check later ensures that if a mixed module is spotted, then
it's a _real_ mixed module that needs rejection, not a module containing
an intentionally ignored GV.

Seriously simplifies the commutation matching logic.

We currently always lower shuffle to the struct-returning variant. I saw
some cases where this survived all the way through ptx, resulting in
increased register usage. The easiest fix is to simply lower to the
single-result version when the predicate is unused.

[X86] getShuffleCost - recognise concat_vector(X,Y) shuffle as InsertSubvector instead of PermuteTwoSrc

We don't have a concat_vector shuffle kind and improveShuffleKindFromMask won't alter the base type to match it as InsertSubvector.

But since this is how X86 will lower concat_vector anyhow, just recognise it explicitly.

Another step for #67803

Noticed while beginning some cleanup for moving to pattern matchers

When emitting the storage (or memory copy operations) for constant
initializers, the decision whether to split a constant structure or
array store into a sequence of field stores or to use `memcpy` is
based upon the optimization level and the size of the initializer.
In afe8b93f, we extended this by
allowing constants to be split when the array (or struct) type does
not match the type of data the address to the object (constant) is
expected to contain. This may happen when `emitStoresForConstant` is
called by `EmitAutoVarInit`, as the element type of the address gets
shrunk. When this occurs, let the initializer be split into a bunch
of stores only under `-ftrivial-auto-var-init=pattern`.

Fixes: https://github.com/llvm/llvm-project/issues/84178.

SIMachineFunctionInfo has a scan  of the function body for inline asm
which may use AGPRs, or callees in SIMachineFunctionInfo. Move this
into the attributor, so it actually works interprocedurally.
    
Could probably avoid most of the test churn if this bothered to avoid
adding this on subtargets without AGPRs. We should also probably
try to delete the MIR scan in usesAGPRs but it seems to be trickier
to eliminate.

At the moment clang-format will return exit code 0 on incomplete
results. In scripts it would sometimes be useful if clang-format would
instead fail in those cases, signalling that there was something wrong
with the code being formatted.

---------

Co-authored-by: Björn Schäpers <github@hazardy.de>
Co-authored-by: Owen Pan <owenpiano@gmail.com>

When importing from LLVM IR the data layout of all pointer types
contains an index bitwidth that should be used for index computations.
This revision adds a getter to the DataLayout that provides access to
the already stored bitwidth. The function returns an optional since only
pointer-like types have an index bitwidth. Querying the bitwidth of a
non-pointer type returns std::nullopt.

The new function works for the built-in Index type and, using a type
interface, for the LLVMPointerType.

Reviving some of the progress on #71764. To recap, we explored removing
the V0 register copies to simplify the pass, but hit a limitation with
the register allocator due to our use of the vmv0 singleton reg class
and early-clobber constraints.

So since we will have to continue to track the definition of V0
ourselves, this patch simplifies it by storing it in a map. It will
allow us to move about copies to V0 in #71764 without having to do extra
bookkeeping.

This reverts commit 26c290b4.

With GPR pairs from Zdinx, we can't guarantee there are no subregisters
on integer instruction operands. I've been able to get these assertions
to fire after some other recent PRs.

I've added a FIXME to support this properly. I just wanted to prevent
the assertion failure for now.

No test case because my other patch #85982 that allowed me to fail the assert
hasn't been approved yet, and I don't know for that that patch is
required to hit this assert. It's just what exposed it for me. So I
think this patch is a good precaution regardless.

unless USE_DEPRECATED_GCC_INSTALL_PREFIX (temporary escape hatch) is
set. Setting GCC_INSTALL_PREFIX leads to a warning for Clang 18.1
(#77537) and will be completely removed for Clang 20.

Link:
discourse.llvm.org/t/add-gcc-install-dir-deprecate-gcc-toolchain-and-remove-gcc-install-prefix/65091
Link:
discourse.llvm.org/t/correct-cmake-parameters-for-building-clang-and-lld-for-riscv/72833

In preparation for the initial ClangIR upstreaming process, move clang
behind MLIR in the list of external projects. Otherwise, cmake will
attempt to build clang before MLIR.

The previous implementation was doing an early successful return on
`rank <= 1` without adding the original op to transform results. This
resulted in errors about number of returns. This patch fixes this by
adding the original op to results. Additionally, we first check if op is
elementwise and return a slienceable failure early if not.

One-Shot Bufferize currently does not support loops where a yielded
value bufferizes to a buffer that is different from the buffer of the
region iter_arg. In such a case, the bufferization fails with an error
such as:
```
Yield operand #0 is not equivalent to the corresponding iter bbArg
    scf.yield %0 : tensor<5xf32>
```

One common reason for non-equivalent buffers is that an op on the path
from the region iter_arg to the terminator bufferizes out-of-place. Ops
that are analyzed earlier are more likely to bufferize in-place.

This commit adds a new heuristic that gives preference to ops that are
reachable on the reverse SSA use-def chain from a region terminator and
are within the parent region of the terminator. This is expected to work
better than the existing heuristics for loops where an iter_arg is
written to multiple times within a loop, but only one write is fed into
the terminator.

Current users of One-Shot Bufferize are not affected by this change.
"Bottom-up" is still the default heuristic. Users can switch to the new
heuristic manually.

This commit also turns the "fuzzer" pass option into a heuristic,
cleaning up the code a bit.

This patch improves codegen for scalar (<128bits) version
of llvm.abs intrinsic by using the existing non-XOR based lowering.
This takes the generated code closer to SDAG.

codegen with GISel for > 128 bit types is not very good
with these method so not doing so.

PR #83567 ports `SelectionDAGISel` to the new pass manager, then each
backend should provide `<Target>DagToDagISel()` in new pass manager
style. Then each target should provide `<Target>PassRegistry.def` to
register backend passes in `registerPassBuilderCallbacks` to reduce
duplicate code.
This PR adds `AArch64PassRegistry.def` to AArch64 backend and
boilerplate code in `registerPassBuilderCallbacks`.

https://github.com/llvm/llvm-project/pull/82927

This reverts commit 9d79589e7c8b728a592a4b6b3dee53ac471d7946
because it failed to suppress the warning.

Make this test case work on both new and legacy pass manager. See also
#85215