This adds a link to an ics file for the LLVM Floating Point WG line in
the Getting Involved page.

These tests were introduced when the Flang driver was originally
incepted. Back then, `flang-new` only supported a handful of basic
options (e.g. `-v`, `-help`, `-E`) and those `-help` tests were used to
guard against Clang options "leaking" into `flang-new -help`.

With the introduction of the concept of "visibility" (see
https://reviews.llvm.org/D157837 and https://reviews.llvm.org/D157151),
these tests are effectively redundant. Also, with the number of flags
growing, these tests are getting rather brittle.

This test will check the mode register in case of constrained floating
point operations.

---------

Co-authored-by: Matt Arsenault <Matthew.Arsenault@amd.com>

This is a preparation to measure the performance impact of
- P2713R1 Escaping improvements in std::format

and its performance improving followup patch.

This change replaces most of the cc1 option checks in the driver test for fast-math option handling. These changes rely on the assumption that the order in which the driver emits floating-point options is stable.
  
The changes also rely on the assumption that the order of prefixes listed on the FileCheck command line is unimportant and that all prefixed checks will be combined and checked as if they were a single prefix. At the time of the change, that worked.

Addresses issue #89709.

Functions getAUTOpcodeForKey() and getPACOpcodeForKey() contain switch
statements without default cases. Resolved by adding a call to
llvm_unreachable() at the end of each function.

---------

Signed-off-by: Troy-Butler <squintik@outlook.com>
Co-authored-by: Troy-Butler <squintik@outlook.com>

Otherwise if you bazel build //... on macOS this fails to build

Locations inside macro expansions have different spelling/expansion
locations. Apply a FIXME to make the libclang function
clang_getSpellingLocation return the right spelling location, and adapt
the testsuite driver code to use the file location rather than the
spelling location to compute source ranges.

Co-authored-by: Matthieu Eyraud <eyraud@adacore.com>

Since all optimizations that use range metadata now also handle range attribute, this patch replaces writes of
range metadata for call instructions to range attributes.

There was a typo in dispatch trampoline.

The HWASan transform currently always uses x20 to pass the shadow base to hwasan_check_memaccess_shortgranules, even if the shadow base is a constant known at compile time (e.g., for Fuchsia, KHWASan, or via -hwasan-mapping-offset).  This patch uses the fixed shadow variant of the hwasan_check_memaccess_shortgranules intrinsic (introduced in https://github.com/llvm/llvm-project/commit/365bddf634993d5ea357e9715d8aacd7ee40c4b5), allowing the shadow base to be materialized inside the memaccess callee.

We currently only support this optimization for AArch64; it is a no-op on other platforms due to lack of support for lowering the intrinsic.

Note: when a binary is instrumented with -hwasan-mapping-offset, it is necessary to specify HWASAN_OPTIONS=fixed_shadow_base=... (see ea991a11) at runtime to ensure the shadow is mapped appropriately.

This makes Zcf imply F and Zcd imply D in RISCVFeatures.td. They
were already implied in RISCISAInfo.cpp.

Some test RUN lines had to be removed because they were testing
that Zcf without F or Zcd without D would reject some instructions.

This PR extracts the existing `scf.forall` to `scf.for` conversion logic
inside a transform op (https://github.com/llvm/llvm-project/pull/65474)
into a standalone function which can be used in other transformations
and adds a `scf-forall-to-for` pass.

The original commit was calling shrinkToUses on an interval for a virtual
register whose def was erased. This fixes it by calling shrinkToUses first
and removing the interval if we erase the old VL def.

Add unit tests for some aspects of the JSON transport and message
handler. These will be expanded in future patches as behavior is
modified.

When writing out a PCM, we skip serializing headers' `HeaderFileInfo`
struct whenever this condition evaluates to `true`:

```c++
!HFI || (HFI->isModuleHeader && !HFI->isCompilingModuleHeader)
```

However, when Clang parses a module map file, each textual header gets a
`HFI` with `isModuleHeader=false`, `isTextualModuleHeader=true` and
`isCompilingModuleHeader=false`. This means the condition evaluates to
`false` even if the header was never included and the module map did not
affect the compilation. Each PCM file that happened to parse such module
map then contains a copy of the `HeaderFileInfo` struct for all textual
headers, and considers the containing module map affecting.

This patch makes it so that we skip headers that have not been included,
essentially removing the virality of textual headers when it comes to
PCM serialization.

This patch does the following:

Adds the following functions:
- replaceDominatedUsesWithIf() that takes a callback.

- canReplacePointersIfEqual(...) returns true if the underlying object
is the same, and for null and const dereferencable pointer replacements.

- canReplacePointersIfEqualInUse(...) returns true for the above as well
as if the use is in icmp/ptrtoint or phi/selects feeding into them.

Updates GVN using the functions above so that the pointer replacements
are only made using the above API.

https://reviews.llvm.org/D143129

In preparation of decoupling codegen for SME from SVE, this patch does a
bit of cleanup to unify the logic around calling
'addTypeForFixedLengthSVE'.

We only want to call this function when:
* We have access to both SVE and NEON, but we prefer to use SVE.
* We have access to SVE, but there is no access to NEON.

Inside 'addTypeForFixedLengthSVE', we normally use Custom lowering for
all operations so they can be converted to/from scalable vector
operations.

However, there are some exceptions:

* For 64/128bit vector loads/stores we prefer the AdvSIMD LDR/STR
D/Q-reg instructions, since these are available in Streaming-SVE mode.

* For some operations like gather/scatter, we can only use SVE if the
full set of SVE instructions is available (as opposed to the
streaming[-compatible] subset). Otherwise, these operations need to
expand (scalarise)

Automatic deallocation of allocatable that are cuda device variable must
use the fir.cuda_deallocate operation. This patch update the automatic
deallocation code generation to use this operation when the variable is
a cuda variable.

This patch has also the side effect to correctly call
`attachDeclarePostDeallocAction` for OpenACC declare variable on
automatic deallocation as well. Update the code in
`attachDeclarePostDeallocAction` so we do not attach on fir.result but
on the correct last op.

These functions are useful in the implementation of the time zone
database. So expose them with private names.

The functions could be exposed before C++ 20, but since libc++ is mostly
C++ 17 complete it seems less useful to allow earlier.

---------

Co-authored-by: Hristo Hristov <zingam@outlook.com>

The pass assumed that all fun.func symbol usages could be safely
replaced by undef, that is not true after #87796 that added a back link
from internal procedure back to the parent procedure. This caused the
internal procedures to be erased and then processed (segfault).

Also set visibility of such internal procedures so that MLIR do not remove them before
the target function is generated for the target region.

Add an initializer for StreamSym, which is a pointer. The pointers in
this class are set in the Init function, but all should be initialized
in the constructor to avoid confusion and static verifier hits.

Seems to cause an address sanitizer failure on one of the buildbots related
to live intervals.

These tests basically were integration tests as unit tests, checking too
many passes at once to be useful, and brittle to any changes.

This patch moves (non-duplicated) tests to `vector-to-arm-sme.mlir`
(which only tests `-convert-vector-to-arm-sme`). The lowering after 
that e.g. `ArmSME -> SCF` and `ArmSME -> LLVM` already have their 
own set of tests covering these cases.

ae389b24 change doesn't cover "_d"
suffix for Debug build on Windows.

Fixed #87381.

A logic issue arose when inlining via `CloneAndPruneFunctionInto`,
which, besides cloning, performs instruction simplification as well.
By the time a new cloned instruction is being simplified, phi-nodes
are not remapped yet as the whole CFG needs to be processed first.
As `VMap` state at this stage is incomplete, `threadCmpOverPHI` and
variants could lead to unsound optimizations. This issue has been
addressed by performing basic constant folding while cloning, and
postponing instruction simplification once phi-nodes are revisited.

Fixes: https://github.com/llvm/llvm-project/issues/87534.

We can expand these as the three instruction sequence: (sub (shl X, C1), (shXadd X, x)).

This target will be used to generate the release binary package for
uploading to GitHub.

Since the requirement is EEW=32, it's impossible that EGW=128
needs LMUL=8.

About unsigned max/min, ANDi is available for all ISA revisions in
extend before slt insn.
So that we can reduce one instruction.