[AArch64] Unify lowering logic for fixed-length vectors. (#89393)
In preparation of decoupling codegen for SME from SVE, this patch does a bit of cleanup to unify the logic around calling 'addTypeForFixedLengthSVE'. We only want to call this function when: * We have access to both SVE and NEON, but we prefer to use SVE. * We have access to SVE, but there is no access to NEON. Inside 'addTypeForFixedLengthSVE', we normally use Custom lowering for all operations so they can be converted to/from scalable vector operations. However, there are some exceptions: * For 64/128bit vector loads/stores we prefer the AdvSIMD LDR/STR D/Q-reg instructions, since these are available in Streaming-SVE mode. * For some operations like gather/scatter, we can only use SVE if the full set of SVE instructions is available (as opposed to the streaming[-compatible] subset). Otherwise, these operations need to expand (scalarise)
parent
7c0da799
Please register or sign in to comment