1. Sep 30, 2023
  2. Sep 29, 2023
    • Nuri Amari's avatar
      Add option to dump IR to files instead of stderr (#66412) · c718336c
      Nuri Amari authored
      This patch adds a flag to LLVM such that the output generated by the
      `-print-(before|after|all)`
      family of flags is written to files in a directory rather than to
      stderr.
      
      This new flag is `-ir-dump-directory` and is used to specify where to
      write the files. No other flags are added, it just modifies the behavior
      of the print flags.
      
      This is a second simplified version of the changes proposed in
      https://github.com/llvm/llvm-project/pull/65179
      
      .
      
      This patch only adds support for the new pass manager. If this patch is
      accepted, similar support can be added to the legacy pass manager.
      
      Co-authored-by: default avatarNuri Amari <nuriamari@fb.com>
      c718336c
    • Ted Woodward's avatar
      [RISC-V] Add RISC-V ABI plugin · 847de9c3
      Ted Woodward authored
      Also default to disassembling a and m features
      Some code taken from https://reviews.llvm.org/D62732 , which hasn't been
      updated in a year.
      
      Tested with 32 and 64 bit Linux user space QEMU
      
      Reviewed By: jasonmolenda
      
      Differential Revision: https://reviews.llvm.org/D159101
      847de9c3
    • Vlad Serebrennikov's avatar
      Remove 'vectorizers' label from PR labeler (#67810) · 18b597be
      Vlad Serebrennikov authored
      It's subsumed by an order of magnitude more popular `vectorization` label that is applied for the same path patterns.
      
      Statistics (issues and PRs together):
      `vectorization`: 91 open, 91 closed
      `vectorizers`: 8 open, 5 closed 
      
      All `vectorizers` usages has occurred in just the past 2 weeks, and likely by our bot.
      18b597be
    • Matthew Devereau's avatar
      [AArch64][SME2][SVE2p1] Add PNR_3b regclass (#67785) · 6f5b372d
      Matthew Devereau authored
      This patch adds the PNR_3b regclass for predicate-as-counter registers
      0-7 and allows the Upl ASM constraint to use this register class.
      6f5b372d
    • Jan Svoboda's avatar
    • Philip Reames's avatar
      [RISCV] Add test coverage for sum reduction recognition in DAG · cd03d970
      Philip Reames authored
      And adjust an existing test to not be a simple reduction to preserve test intent.
      cd03d970
    • Alexey Bataev's avatar
      [SLP]Improve costs in computeExtractCost() to avoid crash after D158449. · 019aee83
      Alexey Bataev authored
      Need to consider the length of the original vector for extractelements,
      not the length, matched number of the scalars. It fixes 2 issues: 1)
      improves cost estimation; 2) Fixes crashes after D158449.
      019aee83
    • Timm Bäder's avatar
      cc696627
    • Vlad Serebrennikov's avatar
    • Andrzej Warzyński's avatar
      [mlir][vector] Prevent incorrect vector.transfer_{read|write} hoisting (#66930) · 94c04772
      Andrzej Warzyński authored
      At the moment, `hoistRedundantVectorTransfers` would hoist the
      `vector.transfer_read`/`vector.transfer_write` pair in this function:
      
      ```mlir
      func.func @no_hoisting_write_to_memref(%rhs: i32, %arg1: vector<1xi32>) {
        %c0_i32 = arith.constant 0 : i32
        %c0 = arith.constant 0 : index
        %c1 = arith.constant 1 : index
        %c4 = arith.constant 4 : index
        %c20 = arith.constant 20 : index
        %alloca = memref.alloca() {alignment = 64 : i64} : memref<1x1x2xi32>
        %cast = memref.cast %alloca : memref<1x1x2xi32> to memref<1x1x2xi32>
        %collapsed_1 = memref.collapse_shape %alloca [[0, 1, 2]] : memref<1x1x2xi32> into memref<2xi32>
        scf.for %_ = %c0 to %c20 step %c4 {
          %collapsed_2 = memref.collapse_shape %alloca [[0, 1, 2]] : memref<1x1x2xi32> into memref<2xi32>
          %lhs = vector.transfer_read %collapsed_1[%c0], %c0_i32 {in_bounds = [true]} : memref<2xi32>, vector<1xi32>
          %acc = vector.transfer_read %collapsed_2[%c0], %c0_i32 {in_bounds = [true]} : memref<2xi32>, vector<1xi32>
          %op = vector.outerproduct %lhs, %rhs, %acc {kind = #vector.kind<add>} : vector<1xi32>, i32
          vector.transfer_write %op, %collapsed_1[%c0] {in_bounds = [true]} : vector<1xi32>, memref<2xi32>
        }
        return
      }
      ```
      as follows:
      ```mlir
        func.func @no_hoisting_write_to_memref(%arg0: i32, %arg1: vector<1xi32>) {
          %c0_i32 = arith.constant 0 : i32
          %c0 = arith.constant 0 : index
          %c4 = arith.constant 4 : index
          %c20 = arith.constant 20 : index
          %alloca = memref.alloca() {alignment = 64 : i64} : memref<1x1x2xi32>
          %collapse_shape = memref.collapse_shape %alloca [[0, 1, 2]] : memref<1x1x2xi32> into memref<2xi32>
          %collapse_shape_0 = memref.collapse_shape %alloca [[0, 1, 2]] : memref<1x1x2xi32> into memref<2xi32>
          %0 = vector.transfer_read %collapse_shape[%c0], %c0_i32 {in_bounds = [true]} : memref<2xi32>, vector<1xi32>
          %1 = vector.transfer_read %collapse_shape_0[%c0], %c0_i32 {in_bounds = [true]} : memref<2xi32>, vector<1xi32>
          %2 = scf.for %arg2 = %c0 to %c20 step %c4 iter_args(%arg3 = %0) -> (vector<1xi32>) {
            %3 = vector.outerproduct %arg3, %arg0, %1 {kind = #vector.kind<add>} : vector<1xi32>, i32
            scf.yield %3 : vector<1xi32>
          }
          vector.transfer_write %2, %collapse_shape[%c0] {in_bounds = [true]} : vector<1xi32>, memref<2xi32>
          return
        }
      ```
      
      This is not safe. While one argument for `vector.outerproduct` (`%rhs`
      from the original loop) is correctly being forwarded via `iter_args`,
      the other one (`%acc` from the original loop) is not.
      
      This patch disables hoisting in cases where the source of "candidate"
      `vector.transfer_read` aliases with some other `memref`. A more generic
      approach would be to make sure that all values are correctly forwarded
      via `iter_args`, but that would require involving alias analysis.
      
      [1] Based on https://github.com/openxla/iree/issues/14994.
      94c04772
    • Kai Nacke's avatar
      [NFC] Fix typo in CodeGenerator.rst · 5c9e90f2
      Kai Nacke authored
      The file format on z/OS is called GOFF (Generalized Object File Format),
      not GCOFF.
      5c9e90f2
    • ZhangYin's avatar
      cf31d0ec
    • Konstantin Varlamov's avatar
      Reapply "[libc++][ranges] Add benchmarks for the `from_range` constructors of... · dd788af7
      Konstantin Varlamov authored
      Reapply "[libc++][ranges] Add benchmarks for the `from_range` constructors of `vector` and `deque`." (#67753)
      
      This reverts commit 10edd5d9 and guards
      against older versions of GCC to work around the problem.
      dd788af7
    • Louis Dionne's avatar
      [ci] Diff against main when determining what files have changed for pre-commit CI (#67743) · ec9d80ec
      Louis Dionne authored
      Since we moved to Github PRs, the workflow has changed a bit and folks
      often merge `main` back into their PR branch. This is fine, except the
      previous way of determining modified files for pre-commit CI would use
      the content modified just in the latest commit, whatever it is. This
      means that in case someone merged main back into their PR branch, we'd
      think that the files in the merge commit were modified by the PR, and
      we'd spuriously trigger a CI run. This should fix this issue.
      
      The downside is that the merge target is hardcoded to `main`, which
      might not always be what we want. I still think this is an improvement
      over the status quo.
      ec9d80ec
    • Qiongsi Wu's avatar
      [AIX][PowerPC] Teach the Threading Library About the Number of Physical Cores on AIX (#67683) · 2cac95ba
      Qiongsi Wu authored
      The threading library does not recognize AIX and always returns `-1` for
      number of physical cores on AIX. This PR teaches the library to
      recognize AIX and obtain the correct value for the number of physical
      cores.
      2cac95ba
    • Mel Chen's avatar
    • Chuanqi Xu's avatar
      [C++20] [Modules] Generate init calls for the modules imported in GMF or PMF · cbbe5559
      Chuanqi Xu authored
      I just found that we didn't handle the imports in GMF of PMF when we're
      generating the init functions for the current module unit. This looks
      like a simple oversight and I'm going to fix that in this patch
      directly.
      cbbe5559