- May 24, 2022
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Matthias Springer authored
Differential Revision: https://reviews.llvm.org/D126179
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Nathan Sidwell authored
C++20 modules require emission of an initializer function, which is called by importers of the module. This implements the mangling for that function. It is the one place the ABI exposes partition names in symbols -- but fortunately only needed by other TUs of that same module. Reviewed By: bruno Differential Revision: https://reviews.llvm.org/D122741
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- May 23, 2022
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Stella Laurenzo authored
Differential Revision: https://reviews.llvm.org/D126182
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Richard authored
When looking for whether or not a check provides fixits, the script examines the implementation of the check. Some checks are not implemented in source files that correspond one-to-one with the check name, e.g. cert-dcl21-cpp. So if we can't find the check implementation directly from the check name, open up the corresponding module file and look for the class name that is registered with the check. Then consult the file corresponding to the class name. Some checks are derived from a base class that implements fixits. So if we can't find fixits in the implementation file for a check, scrape out the name of it's base class. If it's not ClangTidyCheck, then consult the base class implementation to look for fixit support. Differential Revision: https://reviews.llvm.org/D126134 Fixes #55630
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Nikita Popov authored
The order obviously doesn't matter for bitwise and/or, but would matter for logical and/or, so change it to preserve the original order.
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Nikita Popov authored
Add variations with bitwise and logical and/or, as well as commuted operands.
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Jingu Kang authored
This reverts commit 42ebfa82. The commmit from https://reviews.llvm.org/D125918 has fixed the stage 2 build failure. Differential Revision: https://reviews.llvm.org/D118979
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Matthias Springer authored
No longer pass static dim sizes as an attribute. This was redundant and required extra checks in the verifier. This change also makes the op symmetrical to memref::AllocOp. Differential Revision: https://reviews.llvm.org/D126178
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PeixinQiao authored
Remove the integration tests and rename the file. Reviewed By: shraiysh, NimishMishra Differential Revision: https://reviews.llvm.org/D126169
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Alexander Belyaev authored
Differential Revision: https://reviews.llvm.org/D126206
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Jay Foad authored
You can't use foreach in a record body. This was a mistake in the documentation dating from when it was first written in D85838.
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Alexander Belyaev authored
Differential Revision: https://reviews.llvm.org/D126202
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Alexey Bataev authored
SLP vectorizer emits extracts for externally used vectorized scalars and estimates the cost for each such extract. But in many cases these scalars are input for insertelement instructions, forming buildvector, and instead of extractelement/insertelement pair we can emit/cost estimate shuffle(s) cost and generate series of shuffles, which can be further optimized. Tested using test-suite (+SPEC2017), the tests passed, SLP was able to generate/vectorize more instructions in many cases and it allowed to reduce number of re-vectorization attempts (where we could try to vectorize buildector insertelements again and again). Differential Revision: https://reviews.llvm.org/D107966
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Stephen Long authored
https://docs.microsoft.com/en-us/cpp/intrinsics/arm64-intrinsics?view=msvc-170 void __writex18byte(unsigned long, unsigned char) void __writex18word(unsigned long, unsigned short) void __writex18dword(unsigned long, unsigned long) void __writex18qword(unsigned long, unsigned __int64) Given the lack of documentation of the intrinsics, we chose to align the offset with just `CharUnits::One()` when calling `IRBuilderBase::CreateAlignedStore()`. Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D126023
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Sanjay Patel authored
X <u (zext i1 Y) --> (X == 0) && Y https://alive2.llvm.org/ce/z/avQDRY This is a generalization of 4069cccf based on the post-commit suggestion. This also adds the i1 type check and tests that were missing from the earlier attempt; that commit caused several bot fails and was reverted. Differential Revision: https://reviews.llvm.org/D126171
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Sanjay Patel authored
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Alexey Bataev authored
NFC.
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Nikita Popov authored
Similarly to a change recently done for fcmps, add a flag that indicates whether the and/or is logical to foldAndOrOfICmps, and reuse the function when folding logical and/or. We were already calling some parts of it, but this gives us a clearer indication of which parts may need poison-safe variants, and would also allow to fold combinations of bitwise and logical and/or. This change should be close to NFC, because all folds this enables were either already called previously, or can make use of implied poison reasoning.
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Anastasia Stulova authored
Currently added versions are from v1.0 to v1.5, other versions can be added as needed. This change also adds documentation about SPIR-V target support in LLVM. Differential Revision: https://reviews.llvm.org/D124776
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Timm Bäder authored
This reverts commit 8717b492. The new unittest fails on Windows buildbots, e.g. https://lab.llvm.org/buildbot/#/builders/119/builds/8647
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Dmitry Preobrazhensky authored
Differential Revision: https://reviews.llvm.org/D126070
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Sylvestre Ledru authored
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Sylvestre Ledru authored
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Jay Foad authored
These must have crept in since D117298 was landed.
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Edd Barrett authored
This diff adds tests that check the currently-working stackmap cases for i128. This will help ensure no regressions are later introduced by D125680 (when ready). Note that i128 stackmap support is currently incomplete, so we cant test all i128 functionality: i128 constants >= 2^{63} crash LLVM non-constant i128s crash LLVM So this change tests only constant i128 operands of value < 2^{63}. A couple of incorrect comments are also fixed. -
Simon Pilgrim authored
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Timm Bäder authored
And pick the highest one, instead of adding all possibilities to the prefixes. Differential Revision: https://reviews.llvm.org/D125862
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LiaoChunyu authored
These test cases are copy from fma Reviewed By: reames Differential Revision: https://reviews.llvm.org/D126049
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Nikita Popov authored
Freeze the condition of the newly introduced conditional branch, to avoid immediate undefined behavior if the input to ctlz/cttz was originally poison. Differential Revision: https://reviews.llvm.org/D125887
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Andre Vieira authored
This patch adds an AArch64 specific PostRA MachineScheduler to try to schedule STP Q's to the same base-address in ascending order of offsets. We have found this to improve performance on Neoverse N1 and should not hurt other AArch64 cores. Differential Revision: https://reviews.llvm.org/D125377
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Florian Hahn authored
Currently reassociating add expressions can lead to failing to select (u|s)mlal. Implement isReassocProfitable to skip reassociating expressions that can be lowered to (u|s)mlal. The same issue exists for the *mlsl variants as well, but the DAG combiner doesn't use the isReassocProfitable hook before reassociating. To be fixed in a follow-up commit as this requires DAGCombiner changes as well. Reviewed By: dmgreen Differential Revision: https://reviews.llvm.org/D125895
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Chuanqi Xu authored
This reverts commit 1b89a25a. The test would fail in windows versions.
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Peter Waller authored
Previously, `getRegUsageForType` was implemented using `getTypeLegalizationCost`. `getRegUsageForType` is used by the loop vectorizer to estimate the register pressure caused by using a vector type. However, `getTypeLegalizationCost` currently only appears to understand splitting and not scalarization, so significantly underestimates the register requirements. Instead, use `getNumRegisters`, which understands when scalarization can occur (via computeRegisterProperties). This was discovered while investigating D118979 (Set maximum VF with shouldMaximizeVectorBandwidth), where under fixed-length 512-bit SVE the loop vectorizer previously ends up costing an v128i1 as 2 v64i* registers where it actually occupies 128 i32 registers. I'm sending this patch early for comment, I'm still doing some sanity checking with LNT. I note that getRegisterClassForType appears to return VectorRC even though the type in question (large vNi1 types) end up occupying scalar registers. That might be worth fixing too. Differential Revision: https://reviews.llvm.org/D125918
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David Green authored
It is possible for the input type to not be v2i64 or v4i32, so weaken the assertion to a return, fixing the crash in the new test. Fixes #55606
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Chuanqi Xu authored
According to the updates in CWG issue 2585 https://cplusplus.github.io/CWG/issues/2585.html, we shouldn't find an allocation function with (size, p0, …, pn) in global scope.
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Sergei Trofimovich authored
Without the change llvm build fails on this week's gcc-13 snapshot as: [ 91%] Building CXX object unittests/Support/CMakeFiles/SupportTests.dir/Base64Test.cpp.o In file included from llvm/unittests/Support/Base64Test.cpp:14: llvm/include/llvm/Support/Base64.h: In function 'std::string llvm::encodeBase64(const InputBytes&)': llvm/include/llvm/Support/Base64.h:29:5: error: 'uint32_t' was not declared in this scope 29 | uint32_t x = ((unsigned char)Bytes[i] << 16) | | ^~~~~~~~ -
Sergei Trofimovich authored
Without the change llvm build fails on this week's gcc-13 snapshot as: [ 0%] Building CXX object lib/Support/CMakeFiles/LLVMSupport.dir/Signals.cpp.o In file included from llvm/lib/Support/Signals.cpp:14: llvm/include/llvm/Support/Signals.h:119:8: error: variable or field 'CleanupOnSignal' declared void 119 | void CleanupOnSignal(uintptr_t Context); | ^~~~~~~~~~~~~~~ -
Gabor Marton authored
[analyzer][NFC] Factor out the copy-paste code repetition of assumeDual and assumeInclusiveRangeDual Depends on D125892. There might be efficiency and performance implications by using a lambda. Thus, I am going to conduct measurements to see if there is any noticeable impact. I've been thinking about two more alternatives: 1) Make `assumeDualImpl` a variadic template and (perfect) forward the arguments for the used `assume` function. 2) Use a macros. I have concerns though, whether these alternatives would deteriorate the readability of the code. Differential Revision: https://reviews.llvm.org/D125954
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Gabor Marton authored
Depends on D124758. This is the very same thing we have done for assumeDual, but this time we do it for assumeInclusiveRange. This patch is basically a no-brainer copy of that previous patch. Differential Revision: https://reviews.llvm.org/D125892
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Muhammad Omair Javaid authored
This reverts commit a3c3482c. It broke LLDB API test TestBadAddressBreakpoints.py Differential revision: https://reviews.llvm.org/D124731
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