Differential Revision: https://reviews.llvm.org/D93123

Causing issues on Apple buildbots.
http://green.lab.llvm.org/green/job/clang-stage1-RA/17019/console

This reverts commit 33b740f8.
This reverts commit d9697c2e.

Differential Revision: https://reviews.llvm.org/D93199

Should hopefully fix 33b740f8 (D93178) failing on bots.

Differential Revision: https://reviews.llvm.org/D93198

Depends on D84187

Reviewed By: dexonsmith

Original patch by Daniel Grumberg.

Differential Revision: https://reviews.llvm.org/D84188

This is https://bugs.llvm.org/show_bug.cgi?id=44257.

In LLVM style we always print `0` as addend when dumping
SHT_REL relocations. It is confusing, this patch stops
printing it as the first comment on the bug page suggests.

Differential revision: https://reviews.llvm.org/D93033

Depends on D84018

Reviewed By: Bigcheese

Original patch by Daniel Grumberg.

Differential Revision: https://reviews.llvm.org/D84185

This is related to https://bugs.llvm.org/show_bug.cgi?id=40868.

Currently we don't print `OS Specific`/``Processor Specific`/`<unknown>`
prefixes when dumping the ELF file type. This is not consistent
with GNU readelf. The patch fixes it.

Also, this patch removes the `types.test`, because we already have
`file-types.test`, which tests more cases and this patch revealed that
we have such a duplicate.

Differential revision: https://reviews.llvm.org/D93096

Depends on D83979

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D84018

From OMP 5.0 [2.17.8]
Restriction:
If memory-order-clause is release,acquire, or acq_rel, list items must not be specified on the flush directive.

Reviewed By: kiranchandramohan, clementval

Differential Revision: https://reviews.llvm.org/D89879

Reviewed By: usaxena95

Differential Revision: https://reviews.llvm.org/D92299

The runtime library has two family library implementation for ppc_fp128 and fp128.
For IBM Long double(ppc_fp128), it is suffixed with 'l', i.e(sqrtl). For
IEEE Long double(fp128), it is suffixed with "ieee128" or "f128".
We miss to map several libcall for IEEE Long double.

Reviewed By: qiucf

Differential Revision: https://reviews.llvm.org/D91675

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D80109

Patch implements restrictions from 2.17.7  of OpenMP 5.0 standard for atomic Construct. Tests for the same are added.

One of the restriction
`OpenMP constructs may not be encountered during execution of an atomic region.`
Is mentioned in 5.0 standard to be a semantic restriction, but given the stricter nature of parser in F18 it's caught at parsing itself.

This patch is a next patch in series from D88965.

Reviewed By: clementval

Differential Revision: https://reviews.llvm.org/D89583

Invoking the preprocessor ourselves is fragile and would require us to replicate CMake's handling of definitions, compiler flags, etc for proper compatibility.
In my toolchain builds this notably resulted in a bunch of warnings from unused flags as my CMAKE_C_FLAGS includes CPU-specific optimization options.
Notably this part was already duplicating the logic for VISIBILITY_HIDDEN define.

Instead, symlink the files and set the proper set of defines on each.
This should also be faster as we avoid invoking the compiler multiple times.

Fixes https://llvm.org/PR48494

Reviewed By: ilinpv

Differential Revision: https://reviews.llvm.org/D93178

Consider reference, pointer, and pointer-to-member TemplateArguments to be different if they have different types.

For the Itanium ABI, this implements the mangling rule suggested in
https://github.com/itanium-cxx-abi/cxx-abi/issues/47, namely mangling
such template arguments as being cast to the parameter type in the case
where the template name is overloadable. This can cause a mangling
change for rare cases, where

 * the template argument declaration is converted from its declared type
   to the type of the template parameter, and
 * the template parameter either has a deduced type or is a parameter of
   a function template.

However, such changes are necessary to avoid mangling collisions. The
ABI changes can be reversed with -fclang-abi-compat=11 or earlier.

Re-commit with a fix for the regression introduced last time: don't
expect parameters and arguments to line up inside an <unresolved-name>
mangling.

Differential Revision: https://reviews.llvm.org/D91488

This test shows failure of combined stores chains vectorization

add a new goal MustReduceRegisterPressure for machine combiner pass.

PowerPC will use this new goal to do some register pressure related optimization.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D92068

This is part of the codegen pipeline.

This reverts commit 8904ee8a.
Didn't `git add` llvm/ExecutionEngine/JITLink/JITLinkDylib.h and hence doesn't
build anywhere.

JITLinkDylib represents a target dylib for a JITLink link. By representing this
explicitly we can:
  - Enable JITLinkMemoryManagers to manage allocations on a per-dylib basis
    (e.g by maintaining a seperate allocation pool for each JITLinkDylib).
  - Enable new features and diagnostics that require information about the
    target dylib (not implemented in this patch).

Fixes https://github.com/clangd/clangd/issues/577

Differential Revision: https://reviews.llvm.org/D91025

Differential Revision: https://reviews.llvm.org/D93181

Prep for D92993

We already have these patterns for AVX512VNNI.

InstCombine canonicalizes X>C && X<C' style comparisons into
(X+C1)<C2. This type of expression is recognized by some analyses
like LVI, but currently not when used inside assumptions, because
AssumptionCache does not track affected values for it.

This extends the existing x86-64-varargs test by passing enough
arguments that they need to be passed in memory, and by passing them in
reverse order, using va_arg for each argument to retrieve them and
restoring them to the correct order, and by using va_copy to have two
va_lists to use with va_arg.

The declaration was introduced without a corresponding definition on
Feb 9, 2017 in commit aaad9f84.

Differential Revision: https://reviews.llvm.org/D93172

[X86][SSE] combineX86ShufflesRecursively - add basic handling for combining shuffles of different widths (PR45974)

If a faux shuffle uses smaller shuffle inputs, try to recursively combine with those inputs directly instead of widening them immediately. Then widen all smaller inputs at the bottom of the recursion.

This will still mean we're generating nodes on the fly (PR45974) even if we don't combine to a new shuffle but it does help AVX2+ targets combine across xmm/ymm/zmm types, mainly as variable shuffles.

Suggested by @yubing - to check whether we can reuse a single subvector broadcast for 128/256/512-bit vectors.