Fix: https://github.com/llvm/llvm-project/issues/78568



---------

Co-authored-by: jeanPerier <jean.perier.polytechnique@gmail.com>

This is a separate, but related issue to #69152 that was attempting to improve
AA with scalable dependency distances. This patch attempts to improve when
there are scalable accesses with a constant offset between them. We happen to
get a report of such a thing recently, where so long as the vscale_range is
known, the maximum size of the access can be assessed and better aliasing
results can be returned.

The Upper range of the vscale_range, along with known part of the typesize are
used to prove that Off >= CR.upper * LSize. It does not try to produce
PartialAlias results at the moment from the lower vscale_range. It also enables
the added benefit of allowing better alias analysis when the RHS of the two
values is scalable, but the LHS is normal and can be treated like any other
aliasing query.

Even when `private-function-dynamic-ownership` is set, ownership should
never be passed to the callee. This can lead to double deallocs (#77096)
or use-after-free in the caller because ownership is currently passed
regardless of whether there are any further uses of the buffer in the
caller or not.

Note: This is consistent with the fact that ownership is never passed to
nested regions.

This commit fixes #77096.

Also reflow the line for Zabha, as we normally line-wrap this file.

Hoist DPValues attached to each instruction being considered for hoisting if
they are identical in lock-step. This includes the final instructions which
are considered but not hoisted, because the corresponding dbg.values would
appear before those instruction and thus hoisted if identical.

Identical debug records hoisted:
llvm/test/Transforms/SimplifyCFG/hoist-dbgvalue.ll

Non-identical debug records not hoisted:
llvm/test/Transforms/SimplifyCFG/X86/pr39187-g.ll

Debug records attached to first not-hoisted instructions are hoisted:
llvm/test/Transforms/SimplifyCFG/hoist-dbgvalue-inlined.ll

Align the values of the immediate operand of BRK instruction with those
used by the existing arm64e implementation.

Make AuthCheckMethod::DummyLoad use the requested register
instead of LR.

Zicond's graduation to non-experimental was backported to 18.x in #80018,
so remove the release note.

It is needed to provide correct rounding when building FPRep from
greater precision representations.

clang-apply-replacements used to apply format even without --format is
specified. This because, methods like createReplacementsForHeaders only
takes the Spec.Style and would re-order the headers even when it was not
requested. The fix is to set up Spec.Style only if --format is provided.

Also added note to ReleaseNotes.rst

Based on https://github.com/llvm/llvm-project/pull/70801



---------

Co-authored-by: Kugan <34810920+kuganv@users.noreply.github.com>
Co-authored-by: Aaron Ballman <aaron@aaronballman.com>

This will allow future patches to use indexing and methods like
drop_front on the result.

This PR improves the verifier for the `nvgpu.tensormap.descriptor` type.
The descriptor contains information for TMA, and the compile-time check
ensures its restrictions, such as the last memory dimension being
128-byte. This prevents runtime crashes.

See cuda driver for more explanation:

https://docs.nvidia.com/cuda/cuda-driver-api/group__CUDA__TENSOR__MEMORY.html#group__CUDA__TENSOR__MEMORY_1ga7c7d2aaac9e49294304e755e6f341d7

The code ended up treating a use in a call argument as if it were
a call. Make sure this is actually the callee use.

Runtime globals are compiler generated globals injected in user scopes.
They are never referred to directly in lowering code, we only need th
fur.global for them. Yet lowering was creating hlfir.declare for them in
module procedures. In modern fortran apps, this blows up the generated
IR for nothing (Types with dozens of components, type bound procedures
and parents can create in the order of 10 000 runtime info globals to
describe them, if there is a 100 module procedure, that is that is a few
million operations generated and processed in each pass for nothing).

IndVars may replace an instruction with one of its operands, if they
have the same SCEV expression. However, such a replacement may be more
poisonous.

First, check whether the operand being poison implies that the
instruction is also poison, in which case the replacement is always
safe. If this fails, check whether SCEV can determine that reusing the
instruction is safe, using the same check as SCEVExpander.

Fixes https://github.com/llvm/llvm-project/issues/79861.

This reverts commit 722db781.

This reverts commit ab460797.

This reverts commit cfa0833c.

Fixes https://github.com/clangd/clangd/issues/1925

There is an implicit dependency here and we can't call CodeGenIntrinsics.cpp functions from PatternParser.cpp reliably, so some build bots were failing.

Try to add LLVMTableGenCommon to the list of source files to see if it fixes it, if it doesn't , I'll revert.

This fixes #69219.

Consider an example:

```
CoTask my_coroutine() {
    std::abort();
    co_return 1; // unreachable code warning.
}
```

Clang emits a CFG-based unreachable warning on the `co_return` statement
(precisely the `1` subexpr). If we remove this statement, the program
semantic is changed (my_coroutine is not a coroutine anymore).

This patch fixes this issue by never considering coroutine statements as
dead statements.

This just moves code around so the MIR pattern parsing logic is
separated and reusable.

Introduce Code Object V6 in Clang, LLD, Flang and LLVM. This is the same
as V5 except a new "generic version" flag can be present in EFLAGS. This
is related to new generic targets that'll be added in a follow-up patch.
It's also likely V6 will have new changes (possibly new metadata
entries) added later.

Docs change are part of the follow-up patch #76955

While working on -riscv-experimental-rv64-legal-i32, I noticed this
missed optimization in our current codegen.

This expands to SADDO/SSUBO+select while still in i32. These will
be type legalized individually.

Fixes https://github.com/llvm/llvm-project/issues/80557.

This matches the codegen we get from type legalization without
-riscv-experimental-rv64-legal-i32.

A recent comment modified the job to only run on the main branch, but
the formatting was slightly off, causing the job to not run. This patch
fixes the formatting so the job will run as expected.

llvm-issue: https://github.com/llvm/llvm-project/issues/68810