- Jul 01, 2020
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Jack Xiao authored
Copy mes firmware to gpu buffer. Signed-off-by:
Jack Xiao <Jack.Xiao@amd.com> Acked-by:
Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Jack Xiao authored
Copy mes firmware info into into global fw array, preparing for fw front door loading. Signed-off-by:
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Jack Xiao authored
Add sienna_cichlid mes firmware support. Signed-off-by:
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Jack Xiao authored
The routine is implemented to generate mes command to assign the hardware resources which can be scheduled to mes. Signed-off-by:
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Jack Xiao authored
The routine is implemented to generate mes command to query the status of hardware scheduler. Signed-off-by:
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Jack Xiao authored
The routine is implemented to generate mes command to remove a specified hardware queue. Signed-off-by:
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Jack Xiao authored
The routine is implemented to generate mes command to install a hardware queue. Signed-off-by:
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Jack Xiao authored
The helper function is used to submit mes command and poll waiting for the command completion. v2: replaced with amdgpu_fence_wait_polling to wait. Signed-off-by:
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Jack Xiao authored
Add the definitions of mes commands. Signed-off-by:
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Jack Xiao authored
Enable the mes ring during mes block initialization. Signed-off-by:
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Jack Xiao authored
Install mes queue via kiq. Disable it temporarily until it's workable. Signed-off-by:
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Jack Xiao authored
Directly writing mes queue registers to set up it. Signed-off-by:
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Jack Xiao authored
Initialize the mqd according to mes ring setup. Signed-off-by:
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Jack Xiao authored
Allocate mqd buffer preparing for mes queue setup. Signed-off-by:
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Jack Xiao authored
Implement mes ring functions and set up them. Signed-off-by:
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Jack Xiao authored
Do the software initialization on the mes ring. Signed-off-by:
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Jack Xiao authored
eop buffer will be used for mes queue setup. Signed-off-by:
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Jack Xiao authored
Update some mes definitions. Signed-off-by:
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Jack Xiao authored
Check if irq_src is NULL to avoid dereferencing a NULL pointer, for MES ring is uneccessary to recieve an interrupt notification. Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Jack Xiao authored
Add a new ring type definition. Signed-off-by:
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Jack Xiao authored
MES ring will use the assigned doorbell index for command submission. Signed-off-by:
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Leo Liu authored
Sienna_Cichlid have 2 VCN instances, using different register for range Signed-off-by:
Leo Liu <leo.liu@amd.com> Reviewed-by:
James Zhu <James.Zhu@amd.com> Signed-off-by:
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Likun Gao authored
Enable PSP block for firmware loading and other security setup only when amdgpu use PSP load type to load ucode. Signed-off-by:
Likun Gao <Likun.Gao@amd.com> Reviewed-by:
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Likun Gao authored
Add gmc clockgating support for sienna_cichlid. The athub version used for sienna_cichlid is v2.1. Signed-off-by:
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Likun Gao authored
Add athub v2.1 function and support to compile it. Signed-off-by:
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Yong Zhao authored
Signed-off-by:
Yong Zhao <Yong.Zhao@amd.com> Signed-off-by:
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Likun Gao authored
Removed loading duplicate instances of SDMA FW for Sienna_Cichlid, As sienna_cichlid only use a single image for all instances. Signed-off-by:
John Clements <john.clements@amd.com> Signed-off-by:
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Likun Gao authored
Signed-off-by:
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Likun Gao authored
Signed-off-by:
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Likun Gao authored
Signed-off-by:
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Likun Gao authored
Skip ASD FW load for sienna_cichlid currently. Signed-off-by:
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Likun Gao authored
Add SMU block for sienna_cichlid with psp load type. Signed-off-by:
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- Jun 04, 2020
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Likun Gao authored
Enable PPT and TDC for sienna_cichlid. Signed-off-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
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Likun Gao authored
Add function to get smu power index for sienna_cichlid. Signed-off-by:
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Likun Gao authored
Support for Advanced Fan Control (AFC+) for sienna_cichlid. Signed-off-by:
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Likun Gao authored
Enable Graphics Clock (GFXCLK) Spread Spectrum for sienna_cichlid. Signed-off-by:
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Likun Gao authored
Enable LCLK DPM for sienna_cichlid. Signed-off-by:
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Likun Gao authored
Support to print PCIE clk levels for sienna_cichlid. Signed-off-by:
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Likun Gao authored
Add support to set default pcie parameters for sienna_cichlid. Add support to update pcie parameters for sienna_cichlid. Signed-off-by:
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Likun Gao authored
Enable Display Clocks Dynamic Power Management (DPM) for sienna_cichlid. Enable Display Controller Engine Fabric Clock Deep Sleep for sienna_cichlid. Signed-off-by:
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