Commit aa1faaa1 authored by Jack Xiao's avatar Jack Xiao Committed by Alex Deucher
Browse files

drm/amdgpu: upload mes firmware to gpu buffer 



Copy mes firmware to gpu buffer.

Signed-off-by: default avatarJack Xiao <Jack.Xiao@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6b8199fc

drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c

+14 −0
Original line number Diff line number Diff line
@@ -449,6 +449,7 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev, 
	const struct gfx_firmware_header_v1_0 *cp_hdr = NULL;

	const struct dmcu_firmware_header_v1_0 *dmcu_hdr = NULL;

	const struct dmcub_firmware_header_v1_0 *dmcub_hdr = NULL;

	const struct mes_firmware_header_v1_0 *mes_hdr = NULL;



	if (NULL == ucode->fw)

		return 0;
@@ -463,12 +464,15 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev, 
	cp_hdr = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data;

	dmcu_hdr = (const struct dmcu_firmware_header_v1_0 *)ucode->fw->data;

	dmcub_hdr = (const struct dmcub_firmware_header_v1_0 *)ucode->fw->data;

	mes_hdr = (const struct mes_firmware_header_v1_0 *)ucode->fw->data;



	if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP ||

	    (ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC1 &&

	     ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC2 &&

	     ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC1_JT &&

	     ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC2_JT &&

	     ucode->ucode_id != AMDGPU_UCODE_ID_CP_MES &&

	     ucode->ucode_id != AMDGPU_UCODE_ID_CP_MES_DATA &&

	     ucode->ucode_id != AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL &&

	     ucode->ucode_id != AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM &&

	     ucode->ucode_id != AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM &&
@@ -528,6 +532,16 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev, 
		ucode->ucode_size = adev->gfx.rlc.save_restore_list_srm_size_bytes;

		memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_srm,

		       ucode->ucode_size);

	} else if (ucode->ucode_id == AMDGPU_UCODE_ID_CP_MES) {

		ucode->ucode_size = le32_to_cpu(mes_hdr->mes_ucode_size_bytes);

		memcpy(ucode->kaddr, (void *)((uint8_t *)adev->mes.fw->data +

			      le32_to_cpu(mes_hdr->mes_ucode_offset_bytes)),

		       ucode->ucode_size);

	} else if (ucode->ucode_id == AMDGPU_UCODE_ID_CP_MES_DATA) {

		ucode->ucode_size = le32_to_cpu(mes_hdr->mes_ucode_data_size_bytes);

		memcpy(ucode->kaddr, (void *)((uint8_t *)adev->mes.fw->data +

			      le32_to_cpu(mes_hdr->mes_ucode_data_offset_bytes)),

		       ucode->ucode_size);

	}



	return 0;