as of 9/13/2019.
CheckWidths was radically different, I used the upstream-intervals as the base
I added
//TODO:MERGE:CHICK ...
in a number of places where I was uncertain
Following tests failing still
[error] 	firrtlTests.interval.IntervalSpec
[error] 	firrtlTests.fixed.RemoveFixedTypeSpec
[error] 	firrtlTests.transforms.InferWidthsWithAnnosSpec
[error] 	firrtlTests.fixed.FixedTypeInferenceSpec
[error] 	firrtlTests.InternalErrorSpec

# Conflicts:
#	src/main/proto/firrtl.proto
#	src/main/scala/firrtl/LoweringCompilers.scala
#	src/main/scala/firrtl/PrimOps.scala
#	src/main/scala/firrtl/annotations/Target.scala
#	src/main/scala/firrtl/passes/CheckChirrtl.scala
#	src/main/scala/firrtl/passes/Checks.scala
#	src/main/scala/firrtl/passes/InferWidths.scala
#	src/test/scala/firrtlTests/AttachSpec.scala
#	src/test/scala/firrtlTests/CheckInitializationSpec.scala
#	src/test/scala/firrtlTests/CheckSpec.scala
#	src/test/scala/firrtlTests/ChirrtlSpec.scala
#	src/test/scala/firrtlTests/ClockListTests.scala
#	src/test/scala/firrtlTests/ConstantPropagationTests.scala
#	src/test/scala/firrtlTests/ExpandWhensSpec.scala
#	src/test/scala/firrtlTests/InternalErrorSpec.scala
#	src/test/scala/firrtlTests/LowerTypesSpec.scala
#	src/test/scala/firrtlTests/ReplaceAccessesSpec.scala
#	src/test/scala/firrtlTests/UnitTests.scala
#	src/test/scala/firrtlTests/WidthSpec.scala
#	src/test/scala/firrtlTests/WiringTests.scala
#	src/test/scala/firrtlTests/ZeroWidthTests.scala
#	src/test/scala/firrtlTests/fixed/FixedTypeInferenceSpec.scala
#	src/test/scala/firrtlTests/fixed/RemoveFixedTypeSpec.scala

* Copy benchmark.py from https://github.com/jackkoenig/firrtlbench
* Make benchmark use this repo instead of hardcoded subdirectory

Example Use:
  benchmark/scripts/benchmark_cold_compile.py -N 8 --designs regress/*.fir --version master master^

* Update Travis stage names to match new versions

* Drop minor versions from Travis stage names and delete old comment

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Adds a space to correct in an exception message. Corrects
capitalization in Github to it's official name (GitHub) and adds a
link to file an issue.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

* Refactor: remove redundancy code

* Fixed coding style

Programmed Stage Death

This adds the StageError Error. This Error indicates that a
Stage/Phase has hit an unrecoverable error, it cannot continue, and
requests that the entire Stage/Phase hierarchy be killed with an
ExitFailure ExitCode. StageMain is modified to catch StageError and
exit the application with the provided exit code number.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Remove incorrect short option for --info-mode

This should be a helpValueName and not a shortOption.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

* Add abstract "Reset" which can be inferred to AsyncReset or UInt<1>
* Enhance async reset initial value literal check to support aggregates

Improve RemoveReset on Invalid Inits

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

This modifies RemoveReset to NOT generate a mux for
invalid (IsInvalid) inits. In the case of an invalid init, the reset
is converted to a self-connect and no mux is generated.

This is implemented as a new, initial pass over the module to populate
a set of all invalid signals. During the subsequent, circuit-modifying
pass, this invalid set is queried to special case the handling of
invalid inits.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

* Check mems for legal latencies; ban zero write latency.

* Trigger

* Avoid redundancy between CheckChirrtl and CheckHighForm, add more checks

* Add test case for illegal Chirrtl memory in HighForm

Fix FileUtils.getLines, add simple FileUtils tests

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Followup to PR #1142

- use scala.io.Source instead of io.Source
- .toList cleaner way to force stream to be read.
- clear old commented out code in ProtoBufSpec

Fixes a threading bug in where lazy reading of file
caused a problem for multithreaded access to the that was read.

Changes all uses of io.Source to use new API
getText
getLines
getTextResource
getLinesResouce

Make style to only import FileUtils and not its methods
So code is more explicit as e.g. FileUtils.getText()

- Provide new tools for reading in text
  - from a file
  - from a string file name
  - from a resource file
- text can be read in as
  - a single string with newlines
  - a seq of strings, one string per line
- FileUtils put in its own file
  - in same package to keep existing API the same

Hopefully this will protect users from creating resource leaks that
may explain sbt crashing.

Also simpler interface should make code more streamlined, existing
uses of io.Source seem often to be converting between text and seq
unnecessarily.

Add note of caution on requiring slash on resource readers

- Fixes BlackBoxSourceHelper deprecation "since"

* add multi target annotation for advices

* use Seq[Seq[Target]] store targets

* add flat function

* doc simplify

* Allow name of blackbox resource .f file to change from static value

* Restore fileListName as a deprecated def per Jack's feedback

* Support both local and absolute paths for .f resource files

This fixes a bug in the TopWiringTransform when wiring aggregates by
adding ExpandConnects to its list of fixup passes. TopWiringTransform
is MidForm => MidForm, but when wiring aggregates, it will output bulk
connects. This violates the MidForm prerequisite that ExpandConnects
has run. Symptomatically, this will manifest as match errors in
LowerTypes if a user tries to use the TopWiringTransform on
aggregates.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

* fix RenameMap chaining

* fix order of chaining, add another test case