Commit a48e4e4e authored by Albert Magyar's avatar Albert Magyar Committed by David Biancolin
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Optionally allow simple SyncReadMems to pass through VerilogMemDelays

* This is enabled by adding a PassthroughSimpleSyncReadMemsAnnotation
* Can be emitted directly with new changes to the Verilog emitter
* Add some new deprecations to VerilogMemDelays
* Run scalafmt on VerilogMemDelays

(cherry picked from commit 8a9dfa8b)
parent f136e788
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