Unverified Commit 297fbda1 authored by Jim Lawson's avatar Jim Lawson Committed by GitHub
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Don't include verilog header files in "FileList" for VCS/Verilator. (#918)

When constructing the black box helper file list (firrtl_black_box_resource_files.f), filter out Verilog header files (*.vh) - Fixes #917
parent 0a4bcaa4
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