* IO(Analog) fixed for RawModule

* Add a Analog Port for RawModule test & spec

* Fixes around Module instantiation and ports in AnalogPortRawModuleTest

* Shorten Comment

* Add Data.isSynthesizable to distinguish SampleElementBinding

This helps clarify the notion of being bound but not hardware.
Data.topBindingOpt is now used to get the *actual* top binding,
including across SampleElements (eg. in Analog checking that the top is
bound to a Port or a Wire)

* Fix pretty printing for Vec

* Refactor tests for Vec of Analog, add test for Vec of Bundle of Analog

Closes #1075.

This is necessary to support code that imports an implicit conversion
from Int to UInt

Create Chisel IR Port() in a way that Converter is happy with.
Also add more extensive test suite for future-proofing.

Close #1063

This causes sbt tasks (run, test, etc.) to fork to a separate JVM to
avoid running out of metaspace. This issue crops up for developers or
users repeatedly running sbt tasks in the same sbt session.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

- Introduce internal helper `castToInt`, which issues an error when the input
BigInt can't be represented as Int.

- Use `castToInt` wherever we were using `toInt` in a potentially unsafe way.

This is necessary to use ChiselEnum in aggregates where things are
casted using .asTypeOf

Previously, including an empty aggregate in a Bundle would cause
a MixedDirectionAggregateException because it has no elements and thus
doesn't have a direction

* Add SampleElementBinding for Vec sample elements
* Add ActualDirection.Empty for bound empty aggregates

Force clients to access 'DontCare' through the chisel3 package to ensure it's created as a chisel3 object and not a client object.

Discover a working combination of aggregate usage to enable coverage of subproject testing but publish a single Jar.
Use "scalastyle-test-config.xml" for scalastyle config in tests.
Enable "_" in method names and accept method names ending in "_=".
Re-sync scalastyle-test-config.xml with scalastyle-config.xml
This should finally fix #772.

* Turned off strong enum annotations because they weren't working with Vec
indexes
* Add new EnumVecAnnotation for vecs of enums and vecs of bundles with
enum fields
* Changed Clock's width parameter back to a fixed constant value of 1
* Fixed enum annotations for Vecs of Bundles which contain enum elements
* Fixed usage of "when/otherwise" to use consistent style

* Replace textual release version with Shields SemVer badge.

* Provide useful button action for release badge.

Co-Authored-By: Jack Koenig <jack.koenig3@gmail.com>
Co-Authored-By: Jim Lawson <ucbjrl@berkeley.edu>

* Update style warnings now that subprojects are aggregated.
Use "scalastyle-test-config.xml" for scalastyle config in tests.
Enable "_" in method names and accept method names ending in "_=".
Re-sync scalastyle-test-config.xml with scalastyle-config.xml

* Remove bogus tests that crept in with git add

* Add missing import.

Tighten inferred width for PopCount

This changes from using the chiselname annotation on Pipe.apply to
using an explicit TransitName. This results in an improved name for
created valid and bits registers.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Co-Authored-By: ducky64 <elpato25@gmail.com>
Co-Authored-By: Schuyler Eldridge <schuyler.eldridge@gmail.com>
Co-Authored-By: Edward Wang <edward.c.wang@compdigitec.com>