Release automation tries to bump chiseltest which causes issues due to
SBT trying to resolve all dependencies (even for projects that will not
be published, like integrationTests).

(cherry picked from commit b20df1d6

)

Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>

(cherry picked from commit 81fcf229

)

Co-authored-by: Megan Wachs <megan@sifive.com>

This is required in order to support peeks in
chiseltest.

(cherry picked from commit 26cd15a9

)

Co-authored-by: Kevin Laeufer <laeufer@cs.berkeley.edu>

Also remove all non-testing uses of chiselName.

(cherry picked from commit 1c5d1b53

)

Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>

* Add copy constructors for compile options
* Add tests for the copy constructors

Co-authored-by: Jiuyang Liu <liu@jiuyang.me>

(cherry picked from commit 4b10cf7a

)

Co-authored-by: Girish Pai <girish.pai@sifive.com>

* Update scala-compiler, scala-library, ... to 2.12.16 (#2618)

* Update scala-compiler, scala-library, ... to 2.12.16
* Add 2.12.16 to compiler plugin crossbuild

Co-authored-by: Jack Koenig <jack.koenig3@gmail.com>
(cherry picked from commit e4f66357

)

# Conflicts:
#	.github/workflows/test.yml

* Resolve backport conflicts

* Ignore lack of plugin 3.5.3 artifact for Scala 2.12.16

Since 2.12.16 did not exist when 3.5.3 was published, there is no
artifact for the plugin so we must ignore it until 3.5.4 is released.

Co-authored-by: Scala Steward <43047562+scala-steward@users.noreply.github.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit 11e8cc60

)

Co-authored-by: Megan Wachs <megan@sifive.com>

* Refactor TruthTable.apply and add factory method for Espresso (#2612)

Improves performance of creating TruthTables by processing entire BitPats
rather than individual bits. New TruthTable factory method enables
constructing TruthTables with semantics of OR-ing output BitPats together
rather than erroring when multiple terms have the same input BitPat.
This alternative factory method matches semantics for the output format
of Espresso.

Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit 231f14e7

)

# Conflicts:
#	src/main/scala/chisel3/util/BitPat.scala

* Resolve backport conflicts

Co-authored-by: Aditya Naik <91489422+adkian-sifive@users.noreply.github.com>

Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: Megan Wachs <megan@sifive.com>
(cherry picked from commit 3ab34cdd

)

Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>

Links between markdown pages should not have any file extension to ensure they work on the website.

(cherry picked from commit 04d4dc6d

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Deprecate TransitName (#2603)

* Deprecate TransitName
* Add @nowarn macros to usages of TransitName in the repo

Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit a0b05190

)

* Update src/main/scala/chisel3/util/Valid.scala

* Update src/main/scala/chisel3/util/Valid.scala

Co-authored-by: Megan Wachs <megan@sifive.com>

* Publish unidoc as ScalaDoc in chisel project (#2595)

This makes it such that we can stop hosting ScalaDoc on the Chisel
website, instead just pointing to the latest docs on javadoc.io

(cherry picked from commit 8b9f3d78

)

# Conflicts:
#	build.sbt

* Resolve backport conflicts

Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

(cherry picked from commit 7fa0d8bf

)

Co-authored-by: Zachary Yedidia <zyedidia@gmail.com>

Co-authored-by: Megan Wachs <megan@sifive.com>
(cherry picked from commit 4da410e0

)

Co-authored-by: Michael Etzkorn 叶明凯 <34870910+metzkorn@users.noreply.github.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

(cherry picked from commit 6ecf4d39

)

Co-authored-by: Carlos Eduardo <me@carlosedp.com>

Used for separate elaboration of Definition and Instance

(cherry picked from commit 48d57cc8

)

Co-authored-by: Girish Pai <girish.pai@sifive.com>

* Make readme friendlier to beginners (#2586)

(cherry picked from commit 773d2d67

)

# Conflicts:
#	README.md

* Resolve backport conflicts

Co-authored-by: Carlos Eduardo <me@carlosedp.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>

Previously, the plugin would crash with a useless internal error.

(cherry picked from commit 9fcfb252

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit d54a37a5

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Define leading '_' as API for creating temporaries

Chisel and FIRRTL have long used signals with names beginning with an
underscore as an API to specify that the name does not really matter.
Tools like Verilator follow a similar convention and exclude signals
with underscore names from waveform dumps by default. With the
introduction of compiler-plugin prefixing in Chisel 3.4, the convention
remained but was hard for users to use unless the unnnamed signal
existed outside of any prefix domain. Notably, unnamed signals are most
useful when creating wires inside of utility methods which almost always
results in the signal ending up with a prefix.

With this commit, Chisel explicitly recognizes signals whos val names
start with an underscore and preserve that underscore regardless of any
prefixing. Chisel will also ignore such underscores when generating
prefixes based on the temporary signal, preventing accidental double
underscores in the names of signals that are prefixed by the temporary.

(cherry picked from commit bd943662)

* Remove unused defaultPrefix argument from _computeName

(cherry picked from commit ec178aa2

)

# Conflicts:
#	core/src/main/scala/chisel3/Module.scala
#	core/src/main/scala/chisel3/experimental/hierarchy/ModuleClone.scala

* Resolve backport conflicts

* Waive false positive binary compatibility errors

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Added ImplicitInvalidate trait with tests

(cherry picked from commit 1356ced1

)

Co-authored-by: Adam Izraelevitz <adam.izraelevitz@sifive.com>

BitPat.rawString is called a lot when decoding and is used for certain
BitPat operations. We should use it less but this is at least a bandaid.

(cherry picked from commit c11af20f

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit 3c6c044b

)

Co-authored-by: Adam Izraelevitz <adam.izraelevitz@sifive.com>

Include the function being called in the suggestion.

(cherry picked from commit 296623f6

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit 255c56c3

)

Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>

* Factor buildName into reusable function

The new function is chisel3.internal.buildName.

(cherry picked from commit 370ca8ac)

* Add --warn:reflective-naming

This new argument (and associated annotation) will turn on a warning
whenever reflective naming changes the name of a signal. This is
provided to help migrate from Chisel 3.5 to 3.6 since reflective naming
is removed in Chisel 3.6.

(cherry picked from commit 97afd9b9

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Deprecate .U() and .S() syntax for literal bit extracts (#2534)

(cherry picked from commit cadaf33a

)

# Conflicts:
#	macros/src/main/scala/chisel3/internal/sourceinfo/SourceInfoTransform.scala

* Fix backport conflict (#2560)

Co-authored-by: Jared Barocsi <82000041+jared-barocsi@users.noreply.github.com>

Previously, verification statements (assert, assume, cover, and printf)
were only named via reflection.

(cherry picked from commit 7fa2691f

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

This is a formatted version of the p"..." interpolator analogous to
Scala's f"..." interpolator. The primary difference is that it supports
formatting interpolated variables by following the variable with
"%<specifier>". For example:

printf(cf"myWire = $myWire%x\n")

This will format the hardware value "myWire" as a hexidecimal value in
the emitted Verilog. Note that literal "%" must be escaped as "%%".

Scala types and format specifiers are supported and are handled in the
same manner as in standard Scala f"..." interpolators.

(cherry picked from commit 037f7b2f

)

Co-authored-by: Girish Pai <girish.pai@sifive.com>

This includes (and is tested) for both the old .*Name APIs and
.toTarget

(cherry picked from commit 6e0d8d6b

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

ExtModule now uses the same namePorts implementation as regular Modules.
Previously, ExtModules only allowed port naming via runtime reflection.
This meant that .suggestName and other naming APIs do not work. It also
breaks FlatIO for ExtModule which is a potential replacement API for
BlackBox's special `val io` handling.

(cherry picked from commit 83cccfb7

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit a1e3a6b5

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit 77a6c935

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit 68510515

)

Co-authored-by: Gonsolo <gonsolo@gmail.com>