* Move blackbox verilog implementations within reach of verilator
Blackbox implementers can annotate the modules with information on where to get the source verilog
This API is very lightweight, real work is done in firrtl in companion PR
Added some verilog to BlackBoxTest.v resource for testing

* if a file named black_box_verilog_files.f exists add a
-f black_box_verilog_files.f to the verilog to cpp command

* [stevo]: add reset initialization to shift register

* [stevo]: better comment

* [stevo]: add tests, fix bug

Resolves #357
Also remove uses of firrtlToVerilog within chisel3.  Invoking Firrtl
programmatically is preferred to on the command line.  Update README to
indicate that Firrtl need not be installed.

Use the root project's unmanagedBase (".../lib") in all sub-projects.

Fixing a bug in passing down execution options to firrtl

* Name propagation

* chiselName everywhere at best-effort level

* Better collision handling

* Allow recursing into inner anonymous functions

* Add for loop and anonymous inner function tests

Record gives uses the power to create collections of heterogenous elements.
Bundle is a special case of Record that uses reflection to populate the
elements of the collection. Bundle also attempts to implement cloneType whereas
users of Record are required to supply one.

* Mark Annotation and FixedPoint as experimental
Fix tests and other references to these constructs

* Made experimental imports more specific where possible

* Make fromBits work with types other than UInt

* Oops, left in a println

* Add test for truncation/expansion

* Fix stuff that broke when FixedPoint fromBits PR was merged.

* Use .BP shorthand added in previous PR

Have FixedPoint use asFixedPoint in fromBits.

Update FIRRTL cloning instructions.

Throw exceptions for cloneType failures - fix #358

Pass transforms along with Annotations when calling firrtl compiler
This introduces new requirement that firrtl.Transform subclasses (that are associated with an annotation) do not have parameters in their default constructor
Add new test for NoDedup annotation that shows how to annotate a module instance

Set buildInfoUsePackageAsPath to help IDEs.

* Support for creating chisel annotations that are consumed by firrtl
Update annotation serialization in Driver
Add DiamondAnnotation Spec that illustrates how to do simple annotations
frontEnd must have dependency on firrtl
Add annotation method to Module
Circuit has extra optional parameter that is Seq of Annotations
In Builder add annotation buffer to DynamicContext to store annotations created in modules
Added explicit types on naming api methods to avoid type confusion
Because some names are not available until elaboration create intermediate ChiselAnnotation that
gets turned into a firrtl Annotation after elaboration
In execute pass firrtl text and annotation to firrtl are now passed in through optionManager, though
intermediate file .fir and .anno files are still created for inspection and/or later use

* Somehow missed ChiselAnnotation

* fixes for Jack's review of PR

Add examples for utils, move examples from individual apply methods to class overview scaladoc