* Add and use Mill wrapper script (#4119)

This saves developers from having to install a dependency. It also
allows us to drop an old Github Actions dependency that hasn't been
updated in 2 years. This is the standard practice for projects using
Mill on Github.

(cherry picked from commit 0f2efb52

)

# Conflicts:
#	.github/workflows/test.yml
#	CONTRIBUTING.md
#	benchmark/src/main/scala/chisel3/benchmark/Benchmark.scala

* Resolve backport conflicts

---------

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit 25f70bd1

)

Co-authored-by: qimingchu <cchuqiming@gmail.com>

* Bump versions of Github actions to versions using Node 20 (#4116)

Node 16 is deprecated and will eventually stop being supported.

(cherry picked from commit 99aa9f1e

)

# Conflicts:
#	.github/workflows/test.yml

* Resolve backport conflicts

---------

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit c3c99793

)

Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

* FixedIO__Modules with various kinds of probe ports  (#4105)

* - add probe IOs to FixedIOModuleSpec
* getMatchedFields: don't recurse through probes.
* update scaladoc for FlatIO for probe types

---------

Co-authored-by: Will Dietz <will.dietz@sifive.com>
(cherry picked from commit 0553b694

)

# Conflicts:
#	core/src/main/scala/chisel3/Data.scala

* Update Data.scala

---------

Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>

* checkTypeEquivalence now considers ProbeInfo (#4064)

* type equivalence includes probe
* Add type equivalence checks for Probes, including writeability and color.

(cherry picked from commit 62f8a05e

)

* Remove notion of probe color which is a Chisel 7 feature

---------

Co-authored-by: Megan Wachs <megan@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>

Also fix reifySingleData to return the Data itself if it is not a view.

(cherry picked from commit ca49d577

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Fix 0 width signals chiselsim (#4100)

(cherry picked from commit 2f9faa28

)

# Conflicts:
#	src/test/scala/chiselTests/simulator/SimulatorSpec.scala

* Resolve backport conflicts

---------

Co-authored-by: Raffaele Meloni <raffaele.meloni99@gmail.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>

* Fix boring tap of non-passive source from parent. (#4083)

Expected result is fully aligned, which is what happens
when reading from a probe.

When the source is already at the LCA (from parent)
there's no probe and the secret connections only support
a few commands.

For lack of a way to do, e.g., `:#=` here,
use `read(probe(x))` to get the fully aligned result
that's expected and bored down to the child.

This isn't ideal but fixes this using only the sorts of expressions
and commands that we've already committed to supporting.

Fixes #3557.

(cherry picked from commit 0dbedc31

)

# Conflicts:
#	core/src/main/scala/chisel3/RawModule.scala

* Resolve backport conflicts

---------

Co-authored-by: Will Dietz <will.dietz@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>

(cherry picked from commit 151d63bb

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit 4f33bf6c

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

This should always return the same type/alignment regardless of where
the original resides, so if the expectation is a fully aligned result
then create one if needed.

(cherry picked from commit 0cc16586

)

Co-authored-by: Will Dietz <will.dietz@sifive.com>

* Fix widths for literal values in Bundle literals (#4082)

* Fix widths for literal values in Bundle literals

Previously, the user-specified (or unspecified minimum width) of the
literal would be used in some operations like concatenation.

* Implicitly truncate too-wide literals in Bundle literals

This is to fix a bug in concatenation without breaking things relying on
implicit truncation. This will be a warning in newer versions of Chisel.

(cherry picked from commit 3939e570

)

* Waive false binary compatibility failure

Also move waivers from files to build.sbt.

---------

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit d3ab477e

)

Co-authored-by: Amelia Dobis <amelia.dobis@sifive.com>

Fixes muxing of Aggregate views, and fixes ProbeValues of Aggregate
views.

(cherry picked from commit 5af27e5d

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Add modulePorts and fullModulePorts in DataMirror for Instance (#4076)

(cherry picked from commit 62bbad55

)

# Conflicts:
#	core/src/main/scala/chisel3/reflect/DataMirror.scala
#	src/test/scala/chiselTests/reflect/DataMirrorSpec.scala

* Resolve backport conflicts

---------

Co-authored-by: Deborah Soung <debs@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>

Previously, a view of an empty Record or Vec would always have a
litValue of 0.

(cherry picked from commit 11c3f51c

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

Also tweak Vec.Lit code to use cloneAsSuperType rather than implementing
its own version of the same concept.

(cherry picked from commit 86082b1a

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

It should never have been a public API.

(cherry picked from commit e0daaddd

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit 81095f0f

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit 5cf2b402

)

Co-authored-by: Amelia Dobis <ad4048@princeton.edu>

(cherry picked from commit 1e0a9e94

)

Co-authored-by: Jerry Zhao <jerryz123@berkeley.edu>

* minimal reproduce Nested Instantiate bug

* expose cache and elaborated defination to inner defination

* fix up

(cherry picked from commit 02b01e8b

)

Co-authored-by: Jiuyang Liu <liu@jiuyang.me>

Co-authored-by: jackkoenig <jackkoenig@users.noreply.github.com>

* Provide require message for negative widths (#4008)

(cherry picked from commit 751a4cf8

)

# Conflicts:
#	src/test/scala/chiselTests/UIntOps.scala

* Resolve backport conflicts

---------

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Move BitPatSpec from package chiselTests to package chisel3

This allows it to test package private methods.

(cherry picked from commit 09d6fa71)

* Add package private all* methods to BitPat

(cherry picked from commit e9a2c6d5)

* Optimize TruthTable.split and .merge to do nothing in common case

Most TruthTables have a default of all dont care. We can optimize this
common case by doing actual work in TruthTable.split and
TruthTable.merge.

(cherry picked from commit bb32df47

)

---------

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit 121b2659

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

Previously, the function would infinitely recurse resulting in a stack
overflow.

(cherry picked from commit ea2d1036

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit 4be3b6fb

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

(cherry picked from commit ce05462c

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

* [website] Bump Docusaurus to 3.1.1 and fix broken anchors (#3948)

The website build has started failing for an unknown reason, but there
was a warning about the Algolia integration and bumping Docusaurus seems
to fix the issue. Docusaurus 3.1.1 introduces checks for broken anchors
which is also fixed in this PR. One of the broken anchors was to a
section on FixedPoint, as FixedPoint was removed, this section was
deleted.

(cherry picked from commit 946392f5

)

# Conflicts:
#	docs/src/cookbooks/cookbook.md

* Resolve backport conflicts

Also warn instead of throw on broken anchors since website is published
from main rather than this branch.

---------

Co-authored-by: Jack Koenig <koenig@sifive.com>

* Add DeletedPath for targets that no longer exist. (#3937)

(cherry picked from commit 0e911877

)

* Waive binary compatibility issues.

---------

Co-authored-by: Mike Urbach <mike.urbach@sifive.com>

(cherry picked from commit 6dfc0470

)

Co-authored-by: Jack Koenig <koenig@sifive.com>

---------

Co-authored-by: Schuyler Eldridge <schuyler.eldridge@gmail.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit b9f57032

)

Co-authored-by: Michiel Van Beirendonck <michiel.vanbeirendonck@esat.kuleuven.be>

* Rename Scala CLI template to example (#3917)

This avoids name aliasing with the chisel-template repository.

---------

Co-authored-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
(cherry picked from commit bb3c6406

)

# Conflicts:
#	docs/src/installation.md

* Resolve backport conflicts

---------

Co-authored-by: Jack Koenig <koenig@sifive.com>

Co-authored-by: jackkoenig <jackkoenig@users.noreply.github.com>

* Fix ChiselStage and Builder handling of logging (#3895)

Previously, object circt.stage.ChiselStage was ignoring the Logger.
Also, Chisel was not creating its own logger scope which could lead to
clobbering of the Console when running invoking Chisel in the same
process multiple times.

Fix various places we had to workaround this behavior and fix tests
checking --log-level debug.

(cherry picked from commit 88d147d9

)

# Conflicts:
#	src/main/scala/circt/stage/ChiselStage.scala

* Resolve backport conflicts

* Make logger annotations unserializable

Change logger annotations to mix-in the Unserializable trait so that they
will not emitted by a stage.  These annotations are not intended to be
seen by CIRCT and these should be stripped from the output FIRRTL text.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

---------

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
Co-authored-by: Jack Koenig <koenig@sifive.com>
Co-authored-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

(cherry picked from commit 62291553

)

Co-authored-by: qimingchu <1346550347@qq.com>