1. Jan 18, 2021
  2. Jan 16, 2021
  3. Jan 15, 2021
  4. Jan 11, 2021
  5. Jan 07, 2021
  6. Dec 18, 2020
  7. Dec 17, 2020
    • Jack Koenig's avatar
      Switch to using Github Actions CI (#1690) · 25a417f8
      Jack Koenig authored
      MiMa binary compatibility checks are now run on master, but the
      mimaPreviousArtifacts are empty which makes the check a no-op. This
      helps keep both the build.sbt and CI more consistent between master and
      stable branches.
      
      .mergify.yml is also updated with mergify.sc from chisel-repo-tools
      using the following configuration:
      
      conditions:
        - status-success=all tests passed
      branches:
        - 3.2.x
        - 3.3.x
        - 3.4.x
      25a417f8
  8. Dec 09, 2020
  9. Dec 08, 2020
  10. Dec 02, 2020
  11. Nov 24, 2020
  12. Nov 17, 2020
  13. Nov 12, 2020
  14. Nov 11, 2020
  15. Nov 06, 2020
  16. Nov 04, 2020
  17. Nov 03, 2020
  18. Oct 31, 2020
    • Jack Koenig's avatar
      Fix bug where refs may not get set for Records (#1645) · 0979133b
      Jack Koenig authored
      This requires a combination of things, but it happens to be a
      combination used by Diplomacy in Rocket Chip. It must be a Record in
      compatibility code with Vecs as fields and a mix of components with and
      without set directions.
      0979133b
  19. Oct 28, 2020
  20. Oct 27, 2020
  21. Oct 23, 2020
    • Jack Koenig's avatar
      Use Data refs for name prefixing with aggregate elements (#1616) · 0745dede
      Jack Koenig authored
      * Use Data refs for name prefixing with aggregate elements
      
      Vecs set the refs of their elements upon construction of those elements.
      In the past, Records haven't set their elements refs until module close,
      but it can be done sooner. Doing it upon binding means that refs will at
      least be available for Records used in hardware elements. Since only
      bound Data can be connected to anyway, Aggregate elements being
      connected to will always have a ref which we can then use for creating
      naming prefixes.
      
      * Add tighter correctness checks
      
      * Handle more cases in connection prefixing
      
      Add support for forcing setRef to override a previous setting. This
      is only used by BlackBox ports which need to drop their io prefix.
      
      Also add a Try() around Data.bindingToString which sometimes throws
      exceptions when being used to .toString a Data in an error message.
      
      * Strip trailing spaces in names in compiler plugin
      0745dede
  22. Oct 22, 2020
  23. Oct 20, 2020
  24. Oct 15, 2020
  25. Oct 14, 2020
    • Chick Markley's avatar
      ExtModule's lacked support built in support for providing (#1154) · fd92809e
      Chick Markley authored
      * ExtModule's lacked support built in support for providing
      the verilog source. This changes creates traits that
      can be used with ExtModule to provide the support currently found in
      BlackBox
      
      - Add support for ExtModule helpers
        - HasExtModuleResource to use addResource
        - HasExtModuleInline to use setInline
        - HasExtModulePath to use addPath
      - Add tests of the above support.
        - Note: These tests use Stage instead of Driver
      - Added ScalaDoc for HasBlackBoxInline#setInline
      
      * Fix the danged trailing commas.
      
      * Change to use `.transform` as the correct API for `ChiselStage`
      fd92809e
  26. Oct 13, 2020