1. Apr 29, 2021
  2. Apr 28, 2021
    • Chick Markley's avatar
      Introduce VecLiterals (#1834) · 6deb379b
      Chick Markley authored
      This PR provides for support for Vec literals. They can be one of two forms
      Inferred:
      ```
      Vec.Lit(0x1.U, 0x2.U)
      ```
      or explicit:
      ```
      Vec(2, UInt(4.W)).Lit(0 -> 0x1.U, 1 -> 0x2.U)
      ```
      - Explicit form allows for partial, or sparse, literals.
      - Vec literals can be used as Register initializers
      - Arbitrary nesting (consistent with type constraints is allowed)
      6deb379b
  3. Apr 27, 2021
  4. Apr 22, 2021
  5. Apr 20, 2021
  6. Apr 16, 2021
  7. Apr 15, 2021
  8. Apr 13, 2021
  9. Apr 08, 2021
  10. Apr 01, 2021
  11. Mar 30, 2021
  12. Mar 27, 2021
  13. Mar 24, 2021
  14. Mar 19, 2021
    • Jack Koenig's avatar
      Update the FAQ and add doc on versioning (#1827) · 03ec2156
      Jack Koenig authored
      
      
      * Update the FAQ and add doc on versioning
      * Update modules.md
      
      Co-authored-by: default avatarMegan Wachs <megan@sifive.com>
      03ec2156
    • Megan Wachs's avatar
      Reorganize website docs (#1806) · f1ad5b58
      Megan Wachs authored
      Updates to chisel3 documentation for website:
      * guard code examples with mdoc and fix errors encountered along the way
      * move some website content here vs splitting the content across two repos
      * Bring in the interval-types and loading memories content so that it will be visible from the website
      * remove all references to the wiki (deprecated)
      * Remove reference to Wiki from the README
      * fix tabbing and compile of chisel3-vs-chisel2 section
      * Appendix: faqs now guarded and compile
      * FAQs: move to resources section
      f1ad5b58
    • Boyang Han's avatar
    • Schuyler Eldridge's avatar
      Don't toggle top.cpp clock and reset on same cycle (#1820) · ac094a5e
      Schuyler Eldridge authored
      
      
      Change top.cpp to deassert reset one time unit before the clock asserts.
      This avoids a Verilator simultation issue in top.cpp where the eval()
      function is only called once per simultation loop.  If the clock and
      reset are both changed and eval() is only called once, then any
      combinational update due to a change in reset is not visible to the
      sequential logic.  This avoids issues where the downstream compilation
      utilities move synchronous reset logic outside of an always block that
      describes a synchronous reset flip flop.
      
      Reset now deasserts on time unit 10 and the clock ticks on time unit
      11.
      
      h/t @albert-magyar
      
      Signed-off-by: default avatarSchuyler Eldridge <schuyler.eldridge@sifive.com>
      ac094a5e
  15. Mar 18, 2021
  16. Mar 16, 2021
  17. Mar 13, 2021
  18. Mar 12, 2021
  19. Mar 04, 2021
  20. Mar 03, 2021
  21. Mar 02, 2021
  22. Feb 27, 2021