Fixes #450

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Also move all plugins to project/plugins.sbt

Fixes #700

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

A circuit with a single module would fail to properly compute BV RMQs due
to a divide by zero bug.

This changes the computation of the number of blocks an Euler Tour is
broken up into to be, at minimum, one.

This also changes one of the test cases ("wire with source and sink in the
same module") to exercise this.

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

* Initial 0.1-BETA release.

* Update publish clauses.

* Bump version after rebuilding with Java 1.7

* Update to current sbt resolver idiom.

* Bump version

* Revert "Bump version"

This reverts commit 37ce0603.

* Bump version.

* Update installation instructions with sbt publish-local.

* set release version

* bump release versions

* bump SNAPSHOT version

* bump version

* update deprecated sbt code

* Drop pomExtra scm definitions (now generated by git.remoteRepo.

* Incorporate lesssons learned from latest publishing.

* Bump testing coverage for Scala 2.12 support.

* Respond to review requests - unindent changes; unbump plugins version.

Fix Bugs in Constant Propagation

Two instances of the same module could collide in counting the number of
instances of each Module. This could lead to constants being propagated
on inputs when it is incorrect to do so.

Fixes #734

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

Massive refactoring to WiringTransform with the use of a new EulerTour 
class to speed things up via fast least common ancestor (LCA) queries.

Changes include (but are not limited to):

* Use lowest common ancestor when wiring
* Add EulerTour class with naive and Berkman-Vishkin RMQ
* Adds LCA method for Instance Graph
* Enables "Two Sources" using "Top" wiring test as this is now valid
* Remove TopAnnotation from WiringTransform
* Represent WiringTransform sink as `Seq[Named]`
* Remove WiringUtils.countInstances, fix imports
* Support sources under sinks in WiringTransform
* Enable internal module wiring
* Support Wiring of Aggregates
h/t @edcote
fixes #728 

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
Reviewed-by: Jack <Koenig&lt;jack.koenig3@gmail.com>

Fix FirrtlExecutionOptions backward incompatible change (#704).
New options should be added to the end of the list to reduce backward compatibility problems.
Update comment to mention backwards compatibility issue.

Change loadAnnotations to return annotations instead of mutating firrtlOptions
Deprecate implicit annotation file (top.anno) and annotation file override

The logic around this option was unintuitive and led to silently dropped
annotations.

Updated wording

[skip formal checks]
Generate nicer name for remove accesses

Fixes #527 

This resulted in parent modules sometimes being constant proppagated
before a child module. If the child module has a constant driving one of
its outputs, the parent module would thus not see the constant. This
resulted in strange unstable constant propagation behavior where
sometimes constant outputs would not propagate.

Also add test illustrating why this occurs with uses of InstanceGraph

Fixes #708

Bump SBT to 1.0.4 and update plugins
Update Scala versions and sbt commands in .travis.yml
Replace run-main with runMain

Remove wires, replacing them with nodes

Make the check script allow different designs
Add FPU, ICache, and RocketCore to regress and use instead of Rob for CI
equivalence check

This transform replaces all wires with nodes in a legal, flow-forward
order