- Feb 02, 2017
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Howard Mao authored
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- Dec 15, 2016
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Howard Mao authored
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Howard Mao authored
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- Dec 09, 2016
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Howard Mao authored
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- Nov 09, 2016
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Howard Mao authored
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Howard Mao authored
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Jim Lawson authored
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Jim Lawson authored
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Howard Mao authored
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Howard Mao authored
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- Nov 08, 2016
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Jim Lawson authored
Set bridge to Opaque Set abstractionType LibraryRefs Add support for AddressSpaces and "fixed" MemoryMaps (needs generalizing). Add support for Views.
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Howard Mao authored
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- Oct 14, 2016
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Howard Mao authored
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Howard Mao authored
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Howard Mao authored
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Howard Mao authored
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Howard Mao authored
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- Oct 12, 2016
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Howard Mao authored
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Howard Mao authored
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Howard Mao authored
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Howard Mao authored
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- Oct 11, 2016
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Wesley W. Terpstra authored
Safer crossings
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
Adjusted to include names for the new registers. Changes to RegisterCrossing were discarded.
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
If the other clock domain is much faster than ours, it's reset might be shorter than a single cycle in our domain. In that case, we need to catch the reset and extend it.
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Wesley W. Terpstra authored
There is no need to block writes to mem during reset. The Queue must be empty anyway.
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Wesley W. Terpstra authored
This seems to be the more common API
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Wesley W. Terpstra authored
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