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sail-riscv.git
billmcspadden-riscv
c2_emu
cheri
cheri-merge
cheri_lite
cookbook_br
csr_ext
debugmod
epc_legalization
ext_check_phys_mem
ext_check_phys_mem_alt
ext_misa
fdext
fence_issue29
fence_noops
fix-signature-granularity
fix_next_csrs
gdb
haveSmepmp_billmcspadden
hpm_events
hpm_events_billmcspadden
hpm_events_billmcspadden__sail_error_message_is_terse
initial-contributing-guide
inst_extensions
master
master-cleanup
match_warnings
mem_meta
mem_meta_merge
monads
new_test_2
new_test_3
no_boot_rom
no_casts
optimize
priv_1_13
rmem_interpreter
rmn30
rsnikhil
rv_config
sail-coverage-linking
update-copyright-headers
vector-dev
vmem_ext
x_regs
xret_ext
zfa
zfinx
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riscv_sys_regs.sail
Age
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Author
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2019-04-24
Add extended model from cheri-merge.
Prashanth Mundkur
1
-1
/
+4
2019-03-29
Generalize the previous commit to handle hardwired misa.c.
Prashanth Mundkur
1
-11
/
+19
2019-03-29
Tweak legalize_xepc according to spec: xepc[1] should always be writeable.
Robert Norton
1
-4
/
+5
2019-02-19
Use sizeof xlen instead of the value definitions of xlen.
Prashanth Mundkur
1
-5
/
+5
2019-02-13
Fix a bug introduced in changing sxl/uxl handling; fix comment.
Prashanth Mundkur
1
-2
/
+2
2019-02-12
Start extracting bits of vmem that should be common to RV32, and add some def...
Prashanth Mundkur
1
-12
/
+25
2019-02-11
Fix xlen variable name.
Prashanth Mundkur
1
-4
/
+4
2019-02-11
Handle SXL/UXL not being present in mstatus in RV32 by using explicit getters...
Prashanth Mundkur
1
-8
/
+53
2019-02-11
Fix mvendorid width.
Prashanth Mundkur
1
-1
/
+1
2019-02-11
Parameterize CSR fields for xlen, and fix definitions for CSRs which are alwa...
Prashanth Mundkur
1
-14
/
+14
2019-02-08
Start parameterizing definitions by xlen, which is currently still 64.
Prashanth Mundkur
1
-10
/
+10
2019-01-29
Add more of the 'N' standard extension.
Prashanth Mundkur
1
-0
/
+1
2019-01-29
Factor the _sys functionality into separate files for architectural state and...
Prashanth Mundkur
1
-0
/
+536