diff options
author | Scott Johnson <scott.johnson@arilinc.com> | 2020-05-27 15:54:50 -0700 |
---|---|---|
committer | Scott Johnson <scott.johnson@arilinc.com> | 2020-05-27 16:04:28 -0700 |
commit | d062f8c28b6e92d654c7574624294c13f6ea672f (patch) | |
tree | 51833f2d02236bad4057d1968b497acf64516024 /model | |
parent | cefd9f04e7675cd6815395da2765fc11189bf403 (diff) | |
download | sail-riscv-d062f8c28b6e92d654c7574624294c13f6ea672f.zip sail-riscv-d062f8c28b6e92d654c7574624294c13f6ea672f.tar.gz sail-riscv-d062f8c28b6e92d654c7574624294c13f6ea672f.tar.bz2 |
Rename var to distinguish vaddr from paddr
Diffstat (limited to 'model')
-rw-r--r-- | model/riscv_insts_base.sail | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/model/riscv_insts_base.sail b/model/riscv_insts_base.sail index 9b858f9..6189161 100644 --- a/model/riscv_insts_base.sail +++ b/model/riscv_insts_base.sail @@ -325,16 +325,16 @@ function clause execute(LOAD(imm, rs1, rd, is_unsigned, width, aq, rl)) = { then { handle_mem_exception(vaddr, E_Load_Addr_Align()); RETIRE_FAIL } else match translateAddr(vaddr, Read(Data)) { TR_Failure(e, _) => { handle_mem_exception(vaddr, e); RETIRE_FAIL }, - TR_Address(addr, _) => + TR_Address(paddr, _) => match (width, sizeof(xlen)) { (BYTE, _) => - process_load(rd, vaddr, mem_read(Read(Data), addr, 1, aq, rl, false), is_unsigned), + process_load(rd, vaddr, mem_read(Read(Data), paddr, 1, aq, rl, false), is_unsigned), (HALF, _) => - process_load(rd, vaddr, mem_read(Read(Data), addr, 2, aq, rl, false), is_unsigned), + process_load(rd, vaddr, mem_read(Read(Data), paddr, 2, aq, rl, false), is_unsigned), (WORD, _) => - process_load(rd, vaddr, mem_read(Read(Data), addr, 4, aq, rl, false), is_unsigned), + process_load(rd, vaddr, mem_read(Read(Data), paddr, 4, aq, rl, false), is_unsigned), (DOUBLE, 64) => - process_load(rd, vaddr, mem_read(Read(Data), addr, 8, aq, rl, false), is_unsigned) + process_load(rd, vaddr, mem_read(Read(Data), paddr, 8, aq, rl, false), is_unsigned) } } } @@ -380,27 +380,27 @@ function clause execute (STORE(imm, rs2, rs1, width, aq, rl)) = { then { handle_mem_exception(vaddr, E_SAMO_Addr_Align()); RETIRE_FAIL } else match translateAddr(vaddr, Write(Data)) { TR_Failure(e, _) => { handle_mem_exception(vaddr, e); RETIRE_FAIL }, - TR_Address(addr, _) => { + TR_Address(paddr, _) => { let eares : MemoryOpResult(unit) = match width { - BYTE => mem_write_ea(addr, 1, aq, rl, false), - HALF => mem_write_ea(addr, 2, aq, rl, false), - WORD => mem_write_ea(addr, 4, aq, rl, false), - DOUBLE => mem_write_ea(addr, 8, aq, rl, false) + BYTE => mem_write_ea(paddr, 1, aq, rl, false), + HALF => mem_write_ea(paddr, 2, aq, rl, false), + WORD => mem_write_ea(paddr, 4, aq, rl, false), + DOUBLE => mem_write_ea(paddr, 8, aq, rl, false) }; match (eares) { - MemException(e) => { handle_mem_exception(addr, e); RETIRE_FAIL }, + MemException(e) => { handle_mem_exception(paddr, e); RETIRE_FAIL }, MemValue(_) => { let rs2_val = X(rs2); let res : MemoryOpResult(bool) = match (width, sizeof(xlen)) { - (BYTE, _) => mem_write_value(addr, 1, rs2_val[7..0], aq, rl, false), - (HALF, _) => mem_write_value(addr, 2, rs2_val[15..0], aq, rl, false), - (WORD, _) => mem_write_value(addr, 4, rs2_val[31..0], aq, rl, false), - (DOUBLE, 64) => mem_write_value(addr, 8, rs2_val, aq, rl, false) + (BYTE, _) => mem_write_value(paddr, 1, rs2_val[7..0], aq, rl, false), + (HALF, _) => mem_write_value(paddr, 2, rs2_val[15..0], aq, rl, false), + (WORD, _) => mem_write_value(paddr, 4, rs2_val[31..0], aq, rl, false), + (DOUBLE, 64) => mem_write_value(paddr, 8, rs2_val, aq, rl, false) }; match (res) { MemValue(true) => RETIRE_SUCCESS, MemValue(false) => internal_error("store got false from mem_write_value"), - MemException(e) => { handle_mem_exception(addr, e); RETIRE_FAIL } + MemException(e) => { handle_mem_exception(paddr, e); RETIRE_FAIL } } } } |