aboutsummaryrefslogtreecommitdiff
path: root/model
AgeCommit message (Expand)AuthorFilesLines
10 hoursReduce code nesting in `run_hart_active` for simplicity. (#1570)HEAD2026-03-02-efdfe9bmasterPrashanth Mundkur1-55/+56
13 hoursAdd configuration option for reserved mtvec[MODE] values (#1533)tongjiacheng2-6/+15
3 daysUse Sail standard definitions for shifts by integer amounts (#1559)Brian Campbell1-13/+3
3 daysRemove `init_platform` and `platform_wfi` (#1566)Tim Hutt2-19/+5
4 daysLog explicit and implicit updates to `mip`. (#1561)Prashanth Mundkur1-11/+14
4 daysMove interrupt state to its own file (#1565)Tim Hutt3-191/+195
10 daysLog Sail exceptions into the execution trace. (#1555)2026-02-23-c4d3140Prashanth Mundkur3-9/+15
2026-02-13Add missed stateen checks for the high-half CSRs of `hstateen[0-3]`. (#1546)Prashanth Mundkur1-0/+8
2026-02-10Fix fcvt.s.bf16 NaN-boxing returning wrong canonical QNaN (#1528)Nadime Barhoumi1-1/+7
2026-02-09Strengthen some before statements in sail_project file (#1537)Alasdair Armstrong1-3/+1
2026-02-08Remove some unused string mappings. (#1538)Prashanth Mundkur1-31/+2
2026-02-04Validate vector register groups. (#1486)Prashanth Mundkur17-90/+441
2026-02-04Add unratified Zvabd extension (#1478)Tinyueng4-0/+213
2026-02-04Add LCOFI interrupt missed in Sscofpmf. (#1520)Prashanth Mundkur3-17/+39
2026-02-04Fix CSR privilege check for hypervisor mode. (#1504)Prashanth Mundkur1-1/+19
2026-02-03Declare reservation callbacks for C for use in Isla. (#1516)Prashanth Mundkur1-4/+4
2026-02-02Fix typo in directory and module name: Zifenci -> Zifencei. (#1519)Prashanth Mundkur2-2/+2
2026-02-01Add the Zibi extension. (#1507)2026-02-02-e7e6e07tongjiacheng4-0/+71
2026-01-31Add configuration option to handle reserved dynamic rounding modes. (#1491)tongjiacheng2-1/+18
2026-01-31Print registers in AMOCAS reserved message (#1510)tongjiacheng1-5/+5
2026-01-30Ensure physical memory access checks are not bypassed for failing store-condi...Prashanth Mundkur2-2/+19
2026-01-24Add configuration option for reserved behavior: odd number register for RV32Z...2026-01-26-89935a8tongjiacheng2-1/+17
2026-01-24Fix a couple of TODOs now that the VU mode and virtual instruction exceptions...Prashanth Mundkur2-3/+5
2026-01-19Remove N extension InterruptType values (#1492)KotorinMinami1-9/+9
2026-01-19Fix model compilation (#1494)Tim Hutt1-0/+1
2026-01-18Refactor the memory access type. (#1405)Prashanth Mundkur14-129/+356
2026-01-16Add Ssqosid extension (#379)Ved Shanbhogue6-17/+95
2026-01-16Add hypervisor helper to check if privilege level is virtual mode (#1482)Nadime Barhoumi1-2/+6
2026-01-15Whitespace and alignment fixes for vector files. (#1487)Prashanth Mundkur12-66/+102
2026-01-15Add Hypervisor exception causes (#1480)Nadime Barhoumi5-7/+34
2026-01-15Use `bits(1)` and `0b0`/`0b1` consistently in place of `bit` and `bitone`/`bi...Jordan Carlin45-289/+280
2026-01-14Get semicolon-separated list of source files from Sail (#1484)Tim Hutt1-4/+5
2026-01-14Add Hypervisor interrupt causes (#1481)Nadime Barhoumi2-29/+33
2026-01-14Add configuration option for reserved behavior xenvcfg.CBIE = 0b10 (#1447)tongjiacheng2-2/+23
2026-01-14Rename the `ext_access_type` type to `mem_payload`. (#1479)Prashanth Mundkur12-43/+51
2026-01-14Add support for Smstateen and Ssstateen extensions (#910)Nadime Barhoumi9-5/+404
2026-01-08Centralize memory-access-to-fault conversions. (#1475)2026-01-12-397a7e8Prashanth Mundkur5-40/+30
2026-01-08Add configuration option for reserved behavior `pmpcfg with r=0, w=1` (#1422)tongjiacheng3-12/+27
2026-01-07Use a consistent name for variables of MemoryAccessType. (#1474)Prashanth Mundkur11-94/+94
2026-01-04Last remaining refactoring of immediates in encoding clauses for readability....Prashanth Mundkur1-48/+18
2025-12-28Add reserved_behavior.amocas_odd_registers config (#1403)tongjiacheng3-3/+32
2025-12-23c_emulator: validate DTB range against configured PMA regions (#1437)uestc_yd3-5/+16
2025-12-21Use private keyword in virtual memory code (#1310)Alasdair Armstrong25-179/+166
2025-12-21Add missing `csr_write_callback` in `accrue_fflags` (#1432)Jordan Carlin1-1/+3
2025-12-20Improve handling of reserved fences (#1439)Tim Hutt5-77/+78
2025-12-19Rename `ext_write_vcsr` to just `write_vcsr` (#1438)Prashanth Mundkur1-4/+4
2025-12-19Ensure that `rd` is written by `vset{i}vl{i}` even for illegal and reserved `...Prashanth Mundkur1-5/+11
2025-12-17Add Zdinx to configuration and validate Zfinx-related dependencies (#1431)Nadime Barhoumi4-3/+23
2025-12-16Replace hardcoded constant in tlb_hash() with a compile-time constant (#1421)Nadime Barhoumi1-4/+6
2025-12-16Fix location of the `hartSupports_measure` function. (#1429)Prashanth Mundkur1-19/+23
generated by cgit v1.1 at 2026-03-02 05:29:18 +0000