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| author | Prashanth Mundkur <prashanth.mundkur@gmail.com> | 2026-03-01 13:47:39 -0600 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2026-03-01 19:47:39 +0000 |
| commit | efdfe9b72badaf9207848d55fa7c0dfaa4551ce8 (patch) | |
| tree | 3e7bae5d6fd3b2c0ae6c1d8cfca784fa5fcd642d /model/sys | |
| parent | 684d68804be8fc63b6cd948a7f4896e8ef14d18d (diff) | |
| download | sail-riscv-master.zip sail-riscv-master.tar.gz sail-riscv-master.tar.bz2 | |
Reduce code nesting in `run_hart_active` for simplicity. (#1570)HEAD2026-03-02-efdfe9bmaster
When triggers need to be handled for Sdtrig, they need to be considered
in conjunction with pending interrupts. This minor refactor reduces the
code churn to handle that case.
Diffstat (limited to 'model/sys')
0 files changed, 0 insertions, 0 deletions