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| author | Alasdair <alasdair.armstrong@cl.cam.ac.uk> | 2023-06-29 13:30:11 +0100 |
|---|---|---|
| committer | Bill McSpadden <bill@riscv.org> | 2023-08-01 08:54:15 -0500 |
| commit | 58cac61d9ddde591902c933a9dfa5d8ba3fca6da (patch) | |
| tree | 68b5d44c3008a16af32be9c0e099d8ef1fa39ad5 /model/riscv_vmem_common.sail | |
| parent | ae905fb888cbb21c782bacf86be182d9e20b8895 (diff) | |
| download | sail-riscv-58cac61d9ddde591902c933a9dfa5d8ba3fca6da.zip sail-riscv-58cac61d9ddde591902c933a9dfa5d8ba3fca6da.tar.gz sail-riscv-58cac61d9ddde591902c933a9dfa5d8ba3fca6da.tar.bz2 | |
Rename EXTZ and EXTS
Rename EXTZ to zero_extend and EXTS to sign_extend. Two main reasons
for doing this - it means that the source more closely follows the
descriptions in the documentation with more readable names, and EXTS
and EXTZ are visually very close to each other with just the S and Z.
They are also following an odd convention where they are ALLCAPS rather
than snake_case like other functions in the spec.
I think this convention comes from early Power specs in Sail, which
influenced Sail MIPS and CHERI-MIPS, but I don't think it's a very
good convention we should be keeping in sail-riscv
Diffstat (limited to 'model/riscv_vmem_common.sail')
| -rw-r--r-- | model/riscv_vmem_common.sail | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/model/riscv_vmem_common.sail b/model/riscv_vmem_common.sail index adf903f..46134d2 100644 --- a/model/riscv_vmem_common.sail +++ b/model/riscv_vmem_common.sail @@ -97,7 +97,7 @@ function curAsid32(satp : bits(32)) -> asid32 = { /* page table base from satp */ function curPTB32(satp : bits(32)) -> paddr32 = { let s : Satp32 = Mk_Satp32(satp); - shiftl(EXTZ(s.PPN()), PAGESIZE_BITS) + shiftl(zero_extend(s.PPN()), PAGESIZE_BITS) } /* Sv32 parameters and bitfield layouts */ @@ -153,7 +153,7 @@ function curAsid64(satp : bits(64)) -> asid64 = { /* page table base from satp */ function curPTB64(satp : bits(64)) -> paddr64 = { let s = Mk_Satp64(satp); - shiftl(EXTZ(s.PPN()), PAGESIZE_BITS) + shiftl(zero_extend(s.PPN()), PAGESIZE_BITS) } /* Sv39 parameters and bitfield layouts */ |