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| author | Alasdair <alasdair.armstrong@cl.cam.ac.uk> | 2024-03-01 19:57:18 +0000 |
|---|---|---|
| committer | Bill McSpadden <bill@riscv.org> | 2024-04-24 08:38:22 -0500 |
| commit | a39a1ac64e8e716c5bb588f11809dec661ae0f1d (patch) | |
| tree | 55eec6165217f110d1dcf3b403f2e935f70cfda0 /model/riscv_insts_zicsr.sail | |
| parent | 16077e126b634c006590b02cb758d48a3882528a (diff) | |
| download | sail-riscv-a39a1ac64e8e716c5bb588f11809dec661ae0f1d.zip sail-riscv-a39a1ac64e8e716c5bb588f11809dec661ae0f1d.tar.gz sail-riscv-a39a1ac64e8e716c5bb588f11809dec661ae0f1d.tar.bz2 | |
Add read-only CSR MCONFIGPTR
CSR MCONFIGPTR is defined in RISCV priv spec 1.12 but is missing from the
RISC-V SAIL model. This commit adds the read-only CSR MCONFIGPTR.
Co-authored-by: Dan Smathers <dan.smathers@seagate.com>
Diffstat (limited to 'model/riscv_insts_zicsr.sail')
| -rw-r--r-- | model/riscv_insts_zicsr.sail | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/model/riscv_insts_zicsr.sail b/model/riscv_insts_zicsr.sail index d106ad2..7c52abd 100644 --- a/model/riscv_insts_zicsr.sail +++ b/model/riscv_insts_zicsr.sail @@ -29,6 +29,7 @@ function readCSR csr : csreg -> xlenbits = { (0xF12, _) => marchid, (0xF13, _) => mimpid, (0xF14, _) => mhartid, + (0xF15, _) => mconfigptr, (0x300, _) => mstatus.bits, (0x301, _) => misa.bits, (0x302, _) => medeleg.bits, |