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| author | Alex Richardson <Alexander.Richardson@cl.cam.ac.uk> | 2020-11-16 19:19:38 +0000 |
|---|---|---|
| committer | Alex Richardson <Alexander.Richardson@cl.cam.ac.uk> | 2021-03-16 16:18:11 +0000 |
| commit | f09f5102cee74ac2126073ef137e94abe3c11611 (patch) | |
| tree | 85b5320e693ce4d3ec4fe4d9ca77072017240019 /model/riscv_fetch_rvfi.sail | |
| parent | 31b53ea1b7c678a10c3f9caf08b7574d71aad9a6 (diff) | |
| download | sail-riscv-f09f5102cee74ac2126073ef137e94abe3c11611.zip sail-riscv-f09f5102cee74ac2126073ef137e94abe3c11611.tar.gz sail-riscv-f09f5102cee74ac2126073ef137e94abe3c11611.tar.bz2 | |
Initial implementation of new RVFI_DII socket format
This is not a finalized trace format yet.
Diffstat (limited to 'model/riscv_fetch_rvfi.sail')
| -rw-r--r-- | model/riscv_fetch_rvfi.sail | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/model/riscv_fetch_rvfi.sail b/model/riscv_fetch_rvfi.sail index 955dd4b..2579b77 100644 --- a/model/riscv_fetch_rvfi.sail +++ b/model/riscv_fetch_rvfi.sail @@ -1,6 +1,6 @@ function fetch() -> FetchResult = { - rvfi_exec->rvfi_order() = minstret; - rvfi_exec->rvfi_pc_rdata() = EXTZ(get_arch_pc()); + rvfi_inst_data->rvfi_order() = minstret; + rvfi_pc_data->rvfi_pc_rdata() = EXTZ(get_arch_pc()); /* First allow extensions to check pc */ match ext_fetch_check_pc(PC, PC) { @@ -13,12 +13,7 @@ function fetch() -> FetchResult = { TR_Failure(e, _) => F_Error(e, PC), TR_Address(_, _) => { let i = rvfi_instruction.rvfi_insn(); - rvfi_exec->rvfi_insn() = EXTZ(i); - /* TODO: should we write these even if they're not really registers? */ - rvfi_exec->rvfi_rs1_data() = EXTZ(X(i[19 .. 15])); - rvfi_exec->rvfi_rs2_data() = EXTZ(X(i[24 .. 20])); - rvfi_exec->rvfi_rs1_addr() = sail_zero_extend(i[19 .. 15],8); - rvfi_exec->rvfi_rs2_addr() = sail_zero_extend(i[24 .. 20],8); + rvfi_inst_data->rvfi_insn() = EXTZ(i); if (i[1 .. 0] != 0b11) then F_RVC(i[15 .. 0]) else { |