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authorRobert Norton <rmn30@cam.ac.uk>2019-09-04 17:28:22 +0100
committerRobert Norton <rmn30@cam.ac.uk>2019-09-04 17:28:22 +0100
commite918e17c081bc24bbf2ae213c211b9dabc276324 (patch)
tree7621be42dcb86adfaf59f4351498dc7325f6bed2 /model/riscv_fetch.sail
parent50033a227e89d679cd42b070e7e096586275357c (diff)
parent3d75de27c854072b82493a73e01c69d27624bf94 (diff)
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Merge remote-tracking branch 'origin/master' into vmem_ext.vmem_ext
Diffstat (limited to 'model/riscv_fetch.sail')
-rw-r--r--model/riscv_fetch.sail2
1 files changed, 1 insertions, 1 deletions
diff --git a/model/riscv_fetch.sail b/model/riscv_fetch.sail
index f80e99c..64aff4b 100644
--- a/model/riscv_fetch.sail
+++ b/model/riscv_fetch.sail
@@ -12,7 +12,7 @@ function fetch() -> FetchResult =
match ext_fetch_check_pc(PC, PC) {
Ext_FetchAddr_Error(e) => F_Ext_Error(e),
Ext_FetchAddr_OK(use_pc) => {
- if (use_pc[0] != 0b0 | (use_pc[1] != 0b0 & (~ (haveRVC()))))
+ if (use_pc[0] != bitzero | (use_pc[1] != bitzero & (~ (haveRVC()))))
then F_Error(E_Fetch_Addr_Align(), PC)
else match translateAddr(use_pc, Execute()) {
TR_Failure(e, _) => F_Error(e, PC),