aboutsummaryrefslogtreecommitdiff
path: root/doc/ReadingGuide.md
diff options
context:
space:
mode:
authorPrashanth Mundkur <prashanth.mundkur@gmail.com>2019-04-29 16:32:58 -0700
committerPrashanth Mundkur <prashanth.mundkur@gmail.com>2019-04-29 16:32:58 -0700
commitef0e8aac2b738a1b6e7e8d6ff485dfda5f5c0ba8 (patch)
tree06db68045f08ad10cbc18b48705ac74ec79a1eee /doc/ReadingGuide.md
parentf14e8ebac39bf6771f0d1775d5145f7f6549c5ea (diff)
downloadsail-riscv-ef0e8aac2b738a1b6e7e8d6ff485dfda5f5c0ba8.zip
sail-riscv-ef0e8aac2b738a1b6e7e8d6ff485dfda5f5c0ba8.tar.gz
sail-riscv-ef0e8aac2b738a1b6e7e8d6ff485dfda5f5c0ba8.tar.bz2
Update docs for previous commits.
Diffstat (limited to 'doc/ReadingGuide.md')
-rw-r--r--doc/ReadingGuide.md10
1 files changed, 5 insertions, 5 deletions
diff --git a/doc/ReadingGuide.md b/doc/ReadingGuide.md
index 9145ac9..5c7e656 100644
--- a/doc/ReadingGuide.md
+++ b/doc/ReadingGuide.md
@@ -90,11 +90,11 @@ The model contains the following Sail modules in the `model` directory:
- `riscv_step.sail` implements the top-level fetch and execute loop.
The `fetch` is done in 16-bit granules to handle RVC instructions.
The `step` function performs the instruction fetch, handles any
- fetch errors, dispatches the execution of each instruction, and
- checks for any pending interrupts that may need to be handled. A
- `loop` function implements the execute loop, and uses the same HTIF
- (host-target interface) mechanism as the Spike emulator to detect
- termination of execution.
+ fetch errors, decodes the fetched value, dispatches the execution of
+ the decoded instruction, and checks for any pending interrupts that may
+ need to be handled. A `loop` function implements the execute loop,
+ and uses the same HTIF (host-target interface) mechanism as the
+ Spike emulator to detect termination of execution.
- `riscv_analysis.sail` is used in the formal operational RVWMO memory
model.