From ef0e8aac2b738a1b6e7e8d6ff485dfda5f5c0ba8 Mon Sep 17 00:00:00 2001 From: Prashanth Mundkur Date: Mon, 29 Apr 2019 16:32:58 -0700 Subject: Update docs for previous commits. --- doc/ReadingGuide.md | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'doc/ReadingGuide.md') diff --git a/doc/ReadingGuide.md b/doc/ReadingGuide.md index 9145ac9..5c7e656 100644 --- a/doc/ReadingGuide.md +++ b/doc/ReadingGuide.md @@ -90,11 +90,11 @@ The model contains the following Sail modules in the `model` directory: - `riscv_step.sail` implements the top-level fetch and execute loop. The `fetch` is done in 16-bit granules to handle RVC instructions. The `step` function performs the instruction fetch, handles any - fetch errors, dispatches the execution of each instruction, and - checks for any pending interrupts that may need to be handled. A - `loop` function implements the execute loop, and uses the same HTIF - (host-target interface) mechanism as the Spike emulator to detect - termination of execution. + fetch errors, decodes the fetched value, dispatches the execution of + the decoded instruction, and checks for any pending interrupts that may + need to be handled. A `loop` function implements the execute loop, + and uses the same HTIF (host-target interface) mechanism as the + Spike emulator to detect termination of execution. - `riscv_analysis.sail` is used in the formal operational RVWMO memory model. -- cgit v1.1