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riscv-openocd.git
FE_402_fix
__archive__
add_macos_build
autoconf
bscan_optimization
bscan_tunnel
buf_sget
build32
busy
compliance_dev
debug-log-reg-failure
deinit
dmi_read
dmstatus_version
dsp5680_build
eclipse_memory_read
eclipse_multicore_fix
examine_command
examine_unavailable_harts
examine_unavailable_harts_backup
examine_unavailable_harts_rebase
examine_unavailable_harts_squash
fence_i_fix_for_release
fix-halt-reason-after-singlestep
fix_macbuild
gd32vf103
gdb_next_port
gitignore-build
global
halt_examine
haltreq
hypervisor_translate
jlink
log_output
macbuild
macro
manual_hwbp
master
mem64
mpsse_flush
multicore
new_bscan_approach
newprogram
nohartstatus
old_fixes_and_eclipse_memory_read
old_triggers
print_port
race
rbb_cleanup
regcache
regression_test_janmat_experim
release
remove-slot_t-from-riscv-013
reset_test
reverse-resume-order
riscv
riscv-batch-cleanup
riscv-compliance
riscv-compliance-dev
s2_increment
sba_tests
set_group
static
travis-nop
update_defines
us_xds110
vector2
winbuild
wip
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stm32l.cfg
Age
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Author
Files
Lines
2014-12-03
stm32l: split l0/l1 support no jtag, different HSI settings
Karl Palsson
1
-113
/
+0
2014-12-03
stm32: Fix L0/1xx CPUTAPID setting and add new L1xx BSTAPIDs
Juha Niskanen
1
-6
/
+18
2014-10-06
cfg: remove incorrect execute permissions
Spencer Oliver
1
-0
/
+0
2014-10-06
stm32: add L0xx CPUTAPID
Rémi PRUD'HOMME
1
-2
/
+3
2014-08-11
Allow transports to override the selected target (hla configs unification)
Paul Fertser
1
-7
/
+13
2014-07-10
tcl/target/stm32l: restore slow clock on reset
Paul Fertser
1
-1
/
+4
2014-06-28
tcl: introduce using_(jtag|swd|hla) helpers and use them in reset handler
Paul Fertser
1
-2
/
+2
2014-01-09
cfg: add stm32 cmsis-dap compliant config
Spencer Oliver
1
-4
/
+14
2013-04-28
target: rename cortex_m3 to cortex_m
Spencer Oliver
1
-2
/
+2
2012-12-30
cfg: stm32l use minimum family ram size for working area
Spencer Oliver
1
-2
/
+2
2011-11-07
target config files: Fix whitespace issues.
Uwe Hermann
1
-8
/
+8
2011-10-03
STM32L: Added flash driver and target
Clément Burin des Roziers
1
-0
/
+81